Self-assembled nanowire array capacitors: capacitance and interface state profile.

Direct characterization of the capacitance and interface states is very important for understanding the electronic properties of a nanowire transistor. However, the capacitance of a single nanowire is too small to precisely measure. In this work we have fabricated metal-oxide-semiconductor capacitors based on a large array of self-assembled Si nanowires. The capacitance and conductance of the nanowire array capacitors are directly measured and the interface state profile is determined by using the conductance method. We demonstrate that the nanowire array capacitor is an effective platform for studying the electronic properties of nanoscale interfaces. This approach provides a useful and efficient metrology for the study of the physics and device properties of nanoscale metal-oxide-semiconductor structures.

The large-scale integration of high-performance silicon nanowire field effect transistors.

In this work we present a CMOS-compatible self-aligning process for the large-scale-integration of high-performance nanowire field effect transistors with well-saturated drain currents, steep subthreshold slopes at low drain voltage and a large on/off current ratio (>10(7)). The subthreshold swing is as small as 45 mV/dec, which is substantially beyond the thermodynamic limit (60 mV/dec) of conventional planar MOSFETs. These excellent device characteristics are achieved by using a clean integration process and a device structure that allows effective gate-channel-source coupling to tune the source/drain Schottky barriers at the nanoscale.

Noise in ZnO nanowire field effect transistors.

The noise power spectra in ZnO nanowire field effect transistors (FETs) were experimentally investigated and showed a classical 1/f dependence. A Hooge's constant of 5 x 10(-3) was estimated. This value is within the range reported for CMOS FETs with high-k dielectrics, supporting the concept that nanowires can be utilized for future beyond-CMOS electronic applications from the point of view of device noise properties. ZnO FETs measured in a dry O2 environment displayed elevated noise levels compared to in vacuum. At low temperature, random telegraph signals are observed in the drain current.