Recent Progress and Challenges Regarding Carbon Nanotube On-Chip Interconnects.

Along with deep scaling transistors and complex electronics information exchange networks, very-large-scale-integrated (VLSI) circuits require high performance and ultra-low power consumption. In order to meet the demand of data-abundant workloads and their energy efficiency, improving only the transistor performance would not be sufficient. Super high-speed microprocessors are useless if the capacity of the data lines is not increased accordingly. Meanwhile, traditional on-chip copper interconnects reach their physical limitation of resistivity and reliability and may no longer be able to keep pace with a processor's data throughput. As one of the potential alternatives, carbon nanotubes (CNTs) have attracted important attention to become the future emerging on-chip interconnects with possible explorations of new development directions. In this paper, we focus on the electrical, thermal, and process compatibility issues of current on-chip interconnects. We review the advantages, recent developments, and dilemmas of CNT-based interconnects from the perspective of different interconnect lengths and through-silicon-via (TSV) applications.

Energy-efficient non-volatile ferroelectric based electrostatic doping multilevel optical readout memory.

Non-volatile multilevel optical memory is an urgent needed artificial component in neuromorphic computing. In this paper, based on ferroelectric based electrostatic doping (Fe-ED) and optical readout due to plasma dispersion effect, we propose an electrically programmable, multi-level non-volatile photonics memory cell, which can be fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. Hf0.5Zr0.5O2 (HZO) film is chosen as the ferroelectric ED layer and combines with polysilicon layers for an enhanced amplitude modulation between the carrier accumulation and the confined optical field. Insertion loss below 0.4 dB in erasing state and the maximum recording depth of 9.8 dB are obtained, meanwhile maintaining an extremely low dynamic energy consumption as 1.0-8.4 pJ/level. Those features make this memory a promising candidate for artificial optical synapse in neuromorphic photonics and parallel computing.

Evolution of the Interfacial Layer and Its Impact on Electric-Field-Cycling Behaviors in Ferroelectric Hf1-xZrxO2.

Doped HfO2 thin films, which exhibit robust ferroelectricity even with aggressive thickness scaling, could potentially enable ultralow-power logic and memory devices. The ferroelectric properties of such materials are strongly intertwined with the voltage-cycling-induced electrical and structural changes, leading to wake-up and fatigue effects. Such field-cycling-dependent behaviors are crucial to evaluate the reliability of HfO2-based functional devices; however, its genuine nature remains elusive. Herein, we demonstrate the coupling mechanism between the dynamic change of the interfacial layer and wake-up/fatigue phenomena in ferroelectric Hf1-xZrxO2 (HZO) thin films. Comprehensive atomic-resolution microscopy studies have revealed that the interfacial layer between the HZO and neighboring nonoxide electrode experienced a thickness/composition evolution during electrical cycling. Two theoretical models associated with the depolarization field are adopted, giving consistent results with the thickening of the interfacial layer during electrical cycling. Furthermore, we found that the electrical properties of the HZO devices can be manipulated by controlling the interface properties, e.g., through the choice of electrode match and hybrid cycling process. Our results unambiguously reveal the relationship between the interfacial layer and field-cycling behaviors in HZO, which would further permit the reliability improvement in HZO-based ferroelectric devices through interface engineering.

Review of Si-Based GeSn CVD Growth and Optoelectronic Applications.

GeSn alloys have already attracted extensive attention due to their excellent properties and wide-ranging electronic and optoelectronic applications. Both theoretical and experimental results have shown that direct bandgap GeSn alloys are preferable for Si-based, high-efficiency light source applications. For the abovementioned purposes, molecular beam epitaxy (MBE), physical vapour deposition (PVD), and chemical vapor deposition (CVD) technologies have been extensively explored to grow high-quality GeSn alloys. However, CVD is the dominant growth method in the industry, and it is therefore more easily transferred. This review is focused on the recent progress in GeSn CVD growth (including ion implantation, in situ doping technology, and ohmic contacts), GeSn detectors, GeSn lasers, and GeSn transistors. These review results will provide huge advancements for the research and development of high-performance electronic and optoelectronic devices.

ZrOx Negative Capacitance Field-Effect Transistor with Sub-60 Subthreshold Swing Behavior.

Here we report the ZrOx-based negative capacitance (NC) FETs with 45.06 mV/decade subthreshold swing (SS) under ± 1 V VGS range, which can achieve new opportunities in future voltage-scalable NCFET applications. The ferroelectric-like behavior of the Ge/ZrOx/TaN capacitors is proposed to be originated from the oxygen vacancy dipoles. The NC effect of the amorphous HfO2 and ZrOx films devices can be proved by the sudden drop of gate leakage, the negative differential resistance (NDR) phenomenon, the enhancement of IDS and sub-60 subthreshold swing. 5 nm ZrOx-based NCFETs achieve a clockwise hysteresis of 0.24 V, lower than 60 mV/decade SS and an 12% IDS enhancement compared to the control device without ZrOx. The suppressed NC effect of Al2O3/HfO2 NCFET compared with ZrOx NCFET is related to the partial switching of oxygen vacancy dipoles in the forward sweeping due to negative interfacial dipoles at the Al2O3/HfO2 interface.

Low Voltage Operating 2D MoS2 Ferroelectric Memory Transistor with Hf1-xZrxO2 Gate Structure.

Ferroelectric field effect transistor (FeFET) emerges as an intriguing non-volatile memory technology due to its promising operating speed and endurance. However, flipping the polarization requires a high voltage compared with that of reading, impinging the power consumption of writing a cell. Here, we report a CMOS compatible FeFET cell with low operating voltage. We engineer the ferroelectric Hf1-xZrxO2 (HZO) thin film to form negative capacitance (NC) gate dielectrics, which generates a counterclock hysteresis loop of polarization domain in the few-layered molybdenum disulfide (MoS2) FeFET. The unstabilized negative capacitor inherently supports subthermionic swing rate and thus enables switching the ferroelectric polarization with the hysteresis window much less than half of the operating voltage. The FeFET shows a high on/off current ratio of more than 107 and a counterclockwise memory window (MW) of 0.1 V at a miminum program (P)/erase (E) voltage of 3 V. Robust endurance (103 cycles) and retention (104 s) properties are also demonstrated. Our results demonstrate that the HZO/MoS2 ferroelectric memory transistor can achieve new opportunities in size- and voltage-scalable non-volatile memory applications.

Comparative Study of Negative Capacitance Field-Effect Transistors with Different MOS Capacitances.

We demonstrate the negative capacitance (NC) effect of HfZrOx-based field-effect transistors (FETs) in the experiments. Improved IDS, SS, and Gm of NCFET have been achieved in comparison with control metal oxide semiconductor (MOS) FET. In this experiment, the bottom MIS transistors with different passivation time are equivalent to the NC devices with different MOS capacitances. Meanwhile, the electrical properties of NCFET with 40 min passivation are superior to that of NCFET with 60 min passivation owing to the good matching between CFE and CMOS. Although SS of sub-60 mV/decade is not achieved, the non-hysteretic transfer characteristics beneficial to the logic applications are obtained.