Deep reactive ion etching of cylindrical nanopores in silicon for photonic crystals.

Periodic arrays of deep nanopores etched in silicon by deep reactive ion etching are desirable structures for photonic crystals and other nanostructures for silicon nanophotonics. Previous studies focused on realizing as deep as possible nanopores with as high as possible aspect ratios. The resulting nanopores suffered from structural imperfections of the nanopores, such as mask undercut, uneven and large scallops, depth dependent pore radii and tapering. Therefore, our present focus is to realize nanopores that have as cylindrical as possible shapes, in order to obtain a better comparison of nanophotonic observations with theory and simulations. To this end in our 2-step Bosch process we have improved the mask undercut, the uneven scallops, pore widening and positive tapering by optimizing a plethora of parameters such as the etch step time, capacitively coupled plasma (ion energy) and pressure. To add further degrees of control, we implemented a 3-step DREM (deposit, remove, etch, multistep) process. Optimization of the etching process results in cylindrical nanopores with a diameter in the range between 280 and 500 nm and a depth around 7µm, corresponding to high depth-to-diameter aspect ratios between 14 and 25, that are very well suited for the realization of silicon nanophotonic structures.

Method for Keyhole-Free High-Aspect-Ratio Trench Refill by LPCVD.

In micro-machined micro-electromechanical systems (MEMS), refilled high-aspect-ratio trench structures are used for different applications. However, these trenches often show keyholes, which have an impact on the performance of the devices. In this paper, explanations are given on keyhole formation, and a method is presented for etching positively-tapered high-aspect ratio trenches with an optimised trench entrance to prevent keyhole formation. The trench etch is performed by a two-step Bosch-based process, in which the cycle time, platen power, and process pressure during the etch step of the Bosch cycle are studied to adjust the dimensions of the scallops and their location in the trench sidewall, which control the taper of the trench sidewall. It is demonstrated that the amount of chemical flux, being adjusted by the cycle time of the etch step in the Bosch cycle, relates the scallop height to the sidewall profile angle. The required positive tapering of 88° to 89° for a keyhole-free structure after a trench refill by low-pressure chemical vapour deposition is achieved by lowering the time of the etch step.

Heavily-Doped Bulk Silicon Sidewall Electrodes Embedded between Free-Hanging Microfluidic Channels by Modified Surface Channel Technology.

Surface Channel Technology is known as the fabrication platform to make free-hanging microchannels for various microfluidic sensors and actuators. In this technology, thin film metal electrodes, such as platinum or gold, are often used for electrical sensing and actuation purposes. As a result that they are located at the top surface of the microfluidic channels, only topside sensing and actuation is possible. Moreover, in microreactor applications, high temperature degradation of thin film metal layers limits their performance as robust microheaters. In this paper, we report on an innovative idea to make microfluidic devices with integrated silicon sidewall electrodes, and we demonstrate their use as microheaters. This is achieved by modifying the original Surface Channel Technology with optimized mask designs. The modified technology allows to embed heavily-doped bulk silicon electrodes in between the sidewalls of two adjacent free-hanging microfluidic channels. The bulk silicon electrodes have the same electrical properties as the extrinsic silicon substrate. Their cross-sectional geometry and overall dimensions can be designed by optimizing the mask design, hence the resulting resistance of each silicon electrode can be customized. Furthermore, each silicon electrode can be electrically insulated from the silicon substrate. They can be designed with large cross-sectional areas and allow for high power dissipation when used as microheater. A demonstrator device is presented which reached 119 . 4 ∘ C at a power of 206 . 9 m W , limited by thermal conduction through the surrounding air. Other potential applications are sensors using the silicon sidewall electrodes as resistive or capacitive readout.

Wafer-scale 3D shaping of high aspect ratio structures by multistep plasma etching and corner lithography.

The current progress of system miniaturization relies extensively on the development of 3D machining techniques to increase the areal structure density. In this work, a wafer-scale out-of-plane 3D silicon (Si) shaping technology is reported, which combines a multistep plasma etching process with corner lithography. The multistep plasma etching procedure results in high aspect ratio structures with stacked semicircles etched deep into the sidewall and thereby introduces corners with a proper geometry for the subsequent corner lithography. Due to the geometrical contrast between the gaps and sidewall, residues are left only inside the gaps and form an inversion mask inside the semicircles. Using this mask, octahedra and donuts can be etched in a repeated manner into Si over the full wafer area, which demonstrates the potential of this technology for constructing high-density 3D structures with good dimensional control in the bulk of Si wafers.

Micromechanically tuned ring resonator in silicon on insulator.

We demonstrate a monolithically integrated micromechano-optical device where the resonance wavelength of a silicon ring resonator is tuned by perturbing the evanescent field with an electrostatically actuated silicon nitride microcantilever. The resonance wavelength can be tuned over 125 pm.

Nanoimprint lithography for nanophotonics in silicon.

A novel inverse imprinting procedure for nanolithography is presented which offers a transfer accuracy and feature definition that is comparable to state-of-the-art nanofabrication techniques. We illustrate the fabrication quality of a demanding nanophotonic structure: a photonic crystal waveguide. Local examination using photon scanning tunneling microscopy (PSTM) shows that the resulting nanophotonic structures have excellent guiding properties at wavelengths in the telecommunications range, which indicates a high quality of the local structure and the overall periodicity.