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InGaN-based micro-light-emitting diodes have a strong potential as a crucial building block for next-generation displays. However, small-size pixels suffer from efficiency degradations, which increase the power consumption of the display. We demonstrate strategies for epitaxial structure engineering carefully considering the quantum barrier layer and electron blocking layer to alleviate efficiency degradations in low current injection regime by reducing the lateral diffusion of injected carriers via reducing the tunneling rate of electrons through the barrier layer and balanced carrier injection. As a result, the fabricated micro-light-emitting diodes show a high external quantum efficiency of 3.00% at 0.1 A/cm2 for the pixel size of 10 × 10 µm2 and a negligible Jmax EQE shift during size reduction, which is challenging due to the non-radiative recombination at the sidewall. Furthermore, we verify that our epitaxy strategies can result in the relaxation of self-heating of the micro-light-emitting diodes, where the average pixel temperature was effectively reduced.
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GaAs-on-Si templates with two different dislocation filter layers (DFLs) were grown at 550 °C low-temperature (LT)-DFL and 660 °C high-temperature (HT)-DFL using metal organic vapor-phase epitaxy and the effects of the growth temperature were studied. The threading dislocation density (TDD) values of LT-DFL and HT-DFL were 5.2 × 107 cm-2 and 1.5 × 107 cm-2, respectively. The 1.5 × 107 cm-2 of TDD in HT-DFL is reduced by almost one order compared to the 1.2 × 108 cm-2 of that in the control sample without DFLs. The annihilation process was mainly observed in the HT-DFL by a transmission electron microscope, resulting in a lower TDD. The 500-nm-thick GaAs bulk layer and InAs QDs were regrown on GaAs-on-Si templates and the optical properties were also evaluated by photoluminescence (PL). The highest PL peak intensity of the HT-DFL indicates that less non-radiative recombination in both the GaAs bulk and QDs occurred due to the reduced TDD. The GaAs p-i-n diodes were also fabricated to analyze the bulk leakage (JB) and the surface leakage current. The JB of HT-DFL shows the lowest value of 3.625 × 10-7 A/cm-2 at applied bias voltage of 1 V, which is 20 times lower than the JB of the control sample without DFLs. This supports that the high-temperature growth of DFL can make a good performance GaAs device on Si.
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Conventional photon detectors necessarily face critical challenges regarding strong wavelength-selective response and narrow spectral bandwidth, which are undesirable for spectroscopic applications requiring a wide spectral range. With this perspective, herein, we overcome these challenges through a free-carrier absorption-based waveguide-integrated bolometer for infrared spectroscopic sensors on a silicon-on-insulator (SOI) platform featuring a spectrally flat response at near-infrared (NIR) range (1520-1620 nm). An in-depth thermal analysis was conducted with a systematic investigation of geometry dependence on the detectors. We achieved great performances: temperature coefficient of resistance (TCR) of -3.786%/K and sensitivity of -26.75%/mW with a low wavelength dependency, which are record-high values among reported waveguide bolometers so far, to our knowledge. In addition, a clear on-off response with the rise/fall time of 24.2/29.2 µs and a 3-dB roll-off frequency of â¼22 kHz were obtained, sufficient for a wide range of sensing applications. Together with the possibility of expanding an operation range to the mid-infrared (MIR) band, as well as simplicity in the detector architecture, our work here presents a novel strategy for integrated photodetectors covering NIR to MIR at room temperature for the development of the future silicon photonic sensors with ultrawide spectral bandwidth.
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HfO2-based ferroelectric (FE) materials have emerged as a promising material for non-volatile memory applications because of remanent polarization, scalability of thickness below 10 nm, and compatibility with complementary metal-oxide-semiconductor technology. However, in the metal/FE/insulator/semiconductor, it is difficult to improve switching voltage (V sw), endurance, and retention properties due to the interfacial layer (IL), which inevitably grows during the fabrication. Here, we proposed and demonstrated oxygen scavenging to reduce the IL thickness in an HfZrO x -based capacitor and the thinner IL was confirmed by cross-sectional transmission electron microscopy. V sw of a capacitor with scavenging decreased by 18% and the same P r could be obtained at a lower voltage than a capacitor without scavenging. In addition, excellent endurance properties up to 106 cycles were achieved. We believe oxygen scavenging has great potential for future HfZrO x -based memory device applications.
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Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III-V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III-V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration. Considering that the on horizon 6G wireless communication requires faster and more energy-efficient system-on-chip technologies, it is imperative to realize a radio frequency (RF) system in which III-V technology and Si CMOS technology are integrated at a device level. Here we report heterogeneous and monolithic three-dimensional (3D) analog/RF-digital mixed-signal integrated circuits that contain two types of InGaAs high-electron-mobility transistors (HEMTs) designed for high fT and fMAX in the top and Si CMOS mixed-signal circuits consisting of an analog-to-digital converter and digital-to-analog converter in the bottom. A high unity current gain cutoff frequency of 448 GHz and unity power gain cutoff frequency of 742 GHz have been achieved by the fT oriented and fMAX oriented InGaAs HEMTs, respectively, without being affected by mixed-signal interference. At the same time, the bottom Si CMOS circuits provide valid signals without any performance degradation by the integration process.
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The passivation effects of sulfur treatment and Al2O3 passivation for AlGaInP/GaInP red micro-light-emitting-diodes (LEDs) were investigated in terms of the external quantum efficiency (EQE) and the current density showing the peak EQE (JEQE, peak). We systematically compared the electrical and optical characteristics of the micro-LEDs with and without passivation according to various sizes. Interestingly, our investigation indicated that simple electrical characteristics such as current density-voltage property are difficult to precisely reflect the minor change in electrical properties due to passivation when the device has the inherently low leakage current. Whereas the EQE was enhanced by 20% and JEQE, peak was largely shifted to a lower current density region at the LED with a size of 15 × 15 µm2. To examine the passivation effects, we carefully analyzed the EQE and JEQE, peak with the ABC recombination model, and established the methodology to investigate the influence of a sidewall in micro-LEDs. As a result, we extracted the surface recombination velocity regarding the surface passivation, showing a nearly 14% reduction with the passivation.
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A broadband photodetector is becoming increasingly important as a key element for multicolor imaging. We proposed an Au/n-GaSb Schottky photodetector (PD) array with a wide spectral range from ultraviolet (UV) to short-wavelength infrared (SWIR). The PD was formed by deposition of a 5â nm-thick Au layer on the n-type GaSb substrate and subsequent mesa array formation. The fabricated PD array has shown uniform electrical characteristics and good rectifying behaviors. From the photoresponse measurement, the PD has shown uniformly high external quantum efficiency (EQE) over a spectral range of 300â nm to 1700nm. The value of EQE was 35% at 300â nm and exceeded 50% in the IR region. Furthermore, the PD has shown a rapid rise time of 1.44 µs from the transient photoresponse measurement.
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In this paper, we systematically investigated tailoring bolometric properties of a proposed heat-sensitive TiOx/Ti/TiOx tri-layer film for a waveguide-based bolometer, which can play a significant role as an on-chip detector operating in the mid-infrared wavelength range for the integrated optical gas sensors on Ge-on-insulator (Ge-OI) platform. As a proof-of-concept, bolometric test devices with a TiOx single-layer and TiOx/Ti/TiOx tri-layer films were fabricated by varying the layer thickness and thermal treatment condition. Comprehensive characterization was examined by the scanning transmission electron microscopy (STEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) analyses in the prepared films to fully understand the microstructure and interfacial properties and the effects of thermal treatment. Quantitative measurements of the temperature- and time-dependent resistance variations were conducted to deduce the minimum detectable change in temperature (ΔTmin) of the prepared films. Furthermore, based on these experimentally obtained results, limit-of-detection (LoD) for the carbon dioxide gas sensing was estimated to demonstrate the feasibility of the proposed waveguide-based bolometer with the TiOx/Ti/TiOx tri-layer film as an on-chip detector on the Ge-OI platform. It was found that the LoD can reach â¼3.25â ppm and/or even lower with the ΔTmin of 11.64 mK in the device with the TiOx/Ti/TiOx (47/6/47â nm) tri-layer film vacuum-annealed at 400 °C for 15 min, which shows great enhancement of â¼7.7 times lower value compared to the best case of TiOx single-layer films. Our theoretical and experimental demonstration for tailoring bolometric properties of a TiOx/Ti/TiOx tri-layer film provides fairly useful insight on how to improve LoD in the integrated optical gas sensor with the bolometer as an on-chip detector.
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Lightweight, flexible solar cells from III-V semiconductors offer new application opportunities for devices that require a power supply, such as cars, drones, satellites, or wearable devices, due to their outstanding efficiency and power-to-weight ratio (specific power). However, the specific power and stability of flexible photovoltaic (PV) devices need to be enhanced for use in such applications because current flexible PV devices are vulnerable to moisture and heat. Here, we develop ultra-lightweight, flexible InGaP/GaAs tandem solar cells with a dual-function encapsulation layer that serves as both a moisture barrier and an antireflection coating for the active device layer. Using a thin polymer film as a substrate and an ultrathin metal as a bonding layer, the total weight of the device is dramatically reduced. Therefore, the specific power of our solar cells is remarkably high with a value of over 5000 W/kg under the AM 1.5G solar spectrum. Additionally, there is no degradation even if the solar cells are exposed to harsh environmental conditions.
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A high-speed and broadband 5 × 5 photodetector array based on MoS2 /In0.53 Ga0.47 As heterojunction is successfully demonstrated to take full advantage of the type-II band-aligned multilayer MoS2 /In0.53 Ga0.47 As. The fabricated devices exhibit good uniformity in the Raman spectrum and clear rectifying characteristics. The fabricated MoS2 /In0.53 Ga0.47 As photodetectors show good optical performances at a broad wavelength range showing high responsivities corresponding to the detectivity of ≈1010 Jones at -3 V for the incident broadband light from 400 to 1550 nm. A very fast photoresponse is also obtained with a small rise/fall time in the order of microseconds both for visible (638 nm) and shortwave infrared (1310 nm). Finally, the image scanning properties of MoS2 /In0.53 Ga0.47 As devices are demonstrated for visible and infrared light, indicating that the suggested device is one of the promising options for future broadband imager, which can be integrated on the focal plane arrays (FPAs).
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Realizing a neuromorphic-based artificial visual system with low-cost hardware requires a neuromorphic device that can react to light stimuli. This study introduces a photoresponsive neuron device composed of a single transistor, developed by engineering an artificial neuron that responds to light, just like retinal neurons. Neuron firing is activated primarily by electrical stimuli such as current via a well-known single transistor latch phenomenon. Its firing characteristics, represented by spiking frequency and amplitude, are additionally modulated by optical stimuli such as photons. When light is illuminated onto the neuron transistor, electron-hole pairs are generated, and they allow the neuron transistor to fire at lower firing threshold voltage. Different photoresponsive properties can be modulated by the intensity and wavelength of the light, analogous to the behavior of retinal neurons. The artificial visual system can be miniaturized because a photoresponsive neuronal function is realized without bulky components such as image sensors and extra circuits.
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Neuronas , FotonesRESUMEN
Although they have attracted enormous attention in recent years, software-based and two-dimensional hardware-based artificial neural networks (ANNs) may consume a great deal of power. Because there will be numerous data transmissions through a long interconnection for learning, power consumption in the interconnect will be an inevitable problem for low-power computing. Therefore, we suggest and report 3D stackable synaptic transistors for 3D ANNs, which would be the strongest candidate in future computing systems by minimizing power consumption in the interconnection. To overcome the problems of enormous power consumption, it might be necessary to introduce a 3D stackable ANN platform. With this structure, short vertical interconnection can be realized between the top and bottom devices, and the integration density can be significantly increased for integrating numerous neuromorphic devices. In this paper, we suggest and show the feasibility of monolithic 3D integration of synaptic devices using the channel layer transfer method through a wafer bonding technique. Using a low-temperature processible III-V and composite oxide (Al2O3/HfO2/Al2O3)-based weight storage layer, we successfully demonstrated synaptic transistors showing good linearity (αp/αd = 1.8/0.5), a high transconductance ratio (6300), and very good stability. High learning accuracy of 97% was obtained in the training of 1 million MNIST images based on the device characteristics.
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In this study, multicolor photodetectors (PDs) fabricated by using bulk p-i-n-based visible GaAs and near-infrared InGaAs structures were monolithically integrated through a high-throughput epitaxial lift-off (ELO) process. To perform multicolor detection in integrated structures, GaAs PDs were transferred onto InGaAs PDs by using a Y2O3 bonding layer to simultaneously detect visible and near-infrared photons and minimize the optical loss. As a result, it was found that the GaAs top PD and InGaAs bottom PD were vertically aligned without tilting in x-ray diffraction (XRD) measurement. A negligible change in the dark currents for each PD was observed in comparison with reference PDs through electrical characterization. Furthermore, through optical measurements and simulation, photoresponses were clearly revealed in the visible and near-infrared band for the material's absorption region, respectively. Finally, we demonstrated the simultaneous multicolor detection of the visible and near-infrared region,which implies individual access to each PD without mutual interference. These results are a significant improvement for the fabrication of multicolor PDs that enables the formation of bulk-based multicolor PDs on a single substrate with a high pixel density and nearly perfect vertical alignment for high-resolution multicolor imaging.
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Short-wave infrared (SWIR) detectors and emitters have a high potential value in several fields of applications, including the internet of things (IoT) and advanced driver assistance systems (ADAS), gas sensing. Indium Gallium Arsenide (InGaAs) photodetectors are widely used in the SWIR region of 1-3 µm; however, they only capture a part of the region due to a cut-off wavelength of 1.7 µm. This study presents an InAs p-i-n photodetector grown on a GaAs substrate (001) by inserting 730-nm thick InxAl1-xAs graded and AlAs buffer layers between the InAs layer and the GaAs substrate. At room temperature, the fabricated InAs photodetector operated in an infrared range of approximately 1.5-4 µm and its detectivity (D*) was 1.65 × 108 cm · Hz1/2 · W-1 at 3.3 µm. To demonstrate performance, the Sherlock Holmes mapping images were obtained using the photodetector at room temperature.
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In this study, we proposed a strategy to fabricate vertically stacked subpixel (VSS) micro-light-emitting diodes (µ-LEDs) for future ultrahigh-resolution microdisplays. At first, to vertically stack the LED with different colors, we successfully adopted a bonding-interface-engineered monolithic integration method using SiO2/SiNx distributed Bragg reflectors (DBRs). It was found that an intermediate DBR structure could be used as the bonding layer and color filter, which could reflect and transmit desired wavelengths through the bonding interface. Furthermore, the optically pumped µ-LED array with a pitch of 0.4 µm corresponding to the ultrahigh-resolution of 63 500 PPI could be successfully fabricated using a typical semiconductor process, including electron-beam lithography. Compared with the pick-and-place strategy (limited by machine alignment accuracy), the proposed strategy leads to the fabrication of significantly improved high-density µ-LEDs. Finally, we systematically investigated the effects of surface traps using time-resolved photoluminescence (TRPL) and two-dimensional simulations. The obtained results clearly demonstrated that performance improvements could be possible by employing optimal passivation techniques by diminishing the pixel size for fabricating low-power and highly efficient microdisplays.
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In this paper, InAs0.81Sb0.19-based hetero-junction photovoltaic detector (HJPD) with an In0.2Al0.8Sb barrier layer was grown on GaAs substrates. By using technology computer aided design (TCAD), a design of a barrier layer that can achieve nearly zero valance band offsets was accomplished. A high quality InAs0.81Sb0.19 epitaxial layer was obtained with relatively low threading dislocation density (TDD), calculated from a high-resolution X-ray diffraction (XRD) measurement. This layer showed a Hall mobility of 15,000 cm2/Vâ s, which is the highest mobility among InAsSb layers with an Sb composition of around 20% grown on GaAs substrates. Temperature dependence of dark current, photocurrent response and responsivity were measured and analyzed for fabricated HJPD. HJPD showed the clear photocurrent response having a long cutoff wavelength of 5.35 µm at room temperature. It was observed that the dark current of HJPDs is dominated by the diffusion limited current at temperatures ranging from 200K to room temperature from the dark current analysis. Peak responsivity of HJPDs exhibited the 1.18 A/W and 15 mA/W for 83K and a room temperature under zero bias condition even without anti-reflection coating (ARC). From these results, we believe that HJPDs could be an appropriate PD device for future compact and low power dissipation mid-infrared on-chip sensors and imaging devices.
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Si-based integrated circuits have been intensively developed over the past several decades through ultimate device scaling. However, the Si technology has reached the physical limitations of the scaling. These limitations have fuelled the search for alternative active materials (for transistors) and the introduction of optical interconnects (called "Si photonics"). A series of attempts to circumvent the Si technology limits are based on the use of III-V compound semiconductor due to their superior benefits, such as high electron mobility and direct bandgap. To use their physical properties on a Si platform, the formation of high-quality III-V films on the Si (III-V/Si) is the basic technology ; however, implementing this technology using a high-throughput process is not easy. Here, we report new concepts for an ultra-high-throughput heterogeneous integration of high-quality III-V films on the Si using the wafer bonding and epitaxial lift off (ELO) technique. We describe the ultra-fast ELO and also the re-use of the III-V donor wafer after III-V/Si formation. These approaches provide an ultra-high-throughput fabrication of III-V/Si substrates with a high-quality film, which leads to a dramatic cost reduction. As proof-of-concept devices, this paper demonstrates GaAs-based high electron mobility transistors (HEMTs), solar cells, and hetero-junction phototransistors on Si substrates.
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A series of hierarchical ZnO-based antireflection coatings with different nanostructures (nanowires and nanosheets) is prepared hydrothermally, followed by means of RF sputtering of MgF2 layers for coaxial nanostructures. Structural analysis showed that both ZnO had a highly preferred orientation along the ã0001ã direction with a highly crystalline MgF2 shell coated uniformly. However, a small amount of Al was present in nanosheets, originating from Al diffusion from the Al seed layer, resulting in an increase of the optical bandgap. Compared with the nanosheet-based antireflection coatings, the nanowire-based ones exhibited a significantly lower reflectance (â¼2%) in ultraviolet and visible light wavelength regions. In particular, they showed perfect light absorption at wavelength less than approximately 400 nm. However, a GaAs single junction solar cell with nanosheet-based antireflection coatings showed the largest enhancement (43.9%) in power conversion efficiency. These results show that the increase of the optical bandgap of the nanosheets by the incorporation of Al atoms allows more photons enter the active region of the solar cell, improving the performance.
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We report fabrication and optical characteristics of an InGaP/GaAs heterojunction phototransistor (HPT) transferred to a Si substrate by a metal wafer bonding (MWB) and epitaxial lift-off (ELO) process at room temperature. An intermediate Pt/Au double layer between the HPT layer and Si provided a very smooth surface by which to achieve the MWB, and excellent durability against the acid solution during the ELO process. These processes were observed using scanning electron microscope (SEM) and atomic force microscopy (AFM). While the results on a low temperature photoluminescence (LTPL) signal and high resolution x-ray diffraction (HRXRD) rocking curve of the bonded device film implied a defect-free bonding, a very low collector dark current of the fabricated HPT was observed. The optical performance of a bonded InGaP/GaAs HPT on Si, operating at 635 nm wavelength is also investigated.