RESUMO
This paper presents a step down, switched mode power converter for use in multi-standard envelope tracking radio frequency power amplifiers (RFPA). The converter is based on a programmable order sigma delta modulator that can be configured to operate with either 1st, 2nd, 3rd or 4th order loop filters, eliminating the need for a bulky passive output filter. Output ripple, sideband noise and spectral emission requirements of different wireless standards can be met by configuring the modulator's filter order and converter's sampling frequency. The proposed converter is entirely digital and is implemented in 14nm bulk CMOS process for post layout verification. For an input voltage of 3.3V, the converter's output can be regulated to any voltage level from 0.5V to 2.5V, at a nominal switching frequency of 150MHz. It achieves a maximum efficiency of 94% at 1.5 W output power.
RESUMO
In this paper, an improved architecture for RF power amplifier envelope tracking supply modulator is presented. It consists of a single switched mode supply regulator and one linear regulator. The switched mode supply regulator has two outputs, one of which is used in conjunction with the linear regulator to provide a wideband, high efficiency power supply to the RF amplifier, whereas the second output provides a band limited high efficiency supply to the linear regulator. The design offers improved power efficiency, reduced system complexity and area savings since the dual output switched mode regulator requires one inductor and a simple control loop. The design was implemented in 14nm CMOS process and validated with simulations. The supply modulator achieves a peak efficiency of 74% with a 6 dB PAPR 20MHz LTE signal at 29dBm output power.
RESUMO
This paper presents a switching DC-DC Buck converter with enhanced light-load efficiency for use in noise-sensitive applications. Low noise, spur free operation is achieved by using a sigma-delta-modulator (ΣΔ) based controller, while light load efficiency is realized through the introduction of fine step frequency scaling (FSFS) which continuously adjusts the switching frequency of the converter with load conditions. Regulation efficiency is further improved by adoption of mode hopping (continuous conduction mode (CCM)/discontinuous conduction mode (DCM)) and utilization of a fully digital implementation. Furthermore, the presented converter maintains low output voltage ripple across its entire load range by reconfiguring the ΣΔ modulator's quantization step and introducing dither to the loop filter. The proposed modulator was implemented in 14nm bulk CMOS process and validated with post layout simulations. It attains a peak efficiency of 95% at heavy load conditions and 79% at light loads with a maximum voltage ripple of 15mV at light loads.
RESUMO
This work presents an integrated system-on-chip (SoC) that forms the core of a long-term, fully implantable, battery assisted, passive continuous glucose monitor. It integrates an amperometric glucose sensor interface, a near field communication (NFC) wireless front-end and a fully digital switched mode power management unit for supply regulation and on board battery charging. It uses 13.56 MHz (ISM) band to harvest energy and backscatter data to an NFC reader. System was implemented in 14nm CMOS technology and validated with post layout simulations.
RESUMO
This paper presents a system on chip for a fully implantable cochlear implant. It includes acoustic sensor front-end, 4-channel digital sound processing and auditory nerve stimulation circuitry. It also features a digital, switched mode, single inductor dual output power supply that generates two regulated voltages; 0.4 V used to supply on-chip digital blocks and 0.9 V to supply analog blocks and charge the battery when an external RF source is detected. All passives are integrated on-chip including the inductor. The system was implemented in 14nm CMOS and validated with post layout simulations.
