Design, Fabrication, and Testing of a Hybrid CMOS/PDMS Microsystem for Cell Culture and Incubation.

We discuss the design, fabrication, and testing of a hybrid microsystem for stand-alone cell culture and incubation. The micro-incubator is engineered through the integration of a silicon CMOS die for the heater and temperature sensor, with multilayer silicone (PDMS) structures namely, fluidic channels and a 1.5-mm diameter 12-muL culture well. A 90-mum-thick PDMS membrane covers the top of the culture well, acting as barrier to contaminants while at the same time allowing the cells to breath and exchange gases with the ambient environment. The packaging for the microsystem includes a flexible polyimide electronic ribbon cable and four fluidic ports that provide external interfaces to electrical energy, closed-loop sensing and electronic control as well as solid and liquid supplies. The complete structure has a size of (2.5times2.5times0.6) cm(3). We have employed the device to successfully culture BHK-21 cells autonomously over a three day period in ambient environment.

A comparative study of access topologies for chip-level address-event communication channels.

We examine channel access algorithms and circuits for intra and inter chip communication channels. Classical access techniques such as arbitration, scanning, ALOHA, and priority encoding are compared by assessing throughput, latency, and power consumption. Our results provide guidance in the design of bio-inspired networks of processors, for efficient transmission of information with limited power consumption and reduced latency.

A communication channel model for information transmission in the blowfly photoreceptor.

Biological photoreceptors transduce and communicate information about visual stimuli to other neurons through a series of signal transformations among physical states such as concentration of a chemical species, current, or the number of open ion channels. We present a communication channel model to quantify the transmission and degradation of visual information in the blowfly photoreceptor cell. The model is a cascade of linear transfer functions and noise sources that are derived from fundamental principles whenever possible, and whose parameters are estimated from physiological data. We employ the model to calculate the information capacity of blowfly phototransduction; our results compare favorably with estimates of the capacity derived from experimental measurements by de Ruyter van Steveninck and Laughlin (Nature 379 (1996) 642-645) and Juusola (J. Gen. Physiol. 104 (1994) 593-621). The model predicts that photon shot noise and ion channel noise are the dominant noise sources that limits information transmission in the blowfly photoreceptor.

Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons.

We present a scheme for implementing highly-connected, reconfigurable networks of integrate-and-fire neurons in VLSI. Neural activity is encoded by spikes, where the address of an active neuron is communicated through an asynchronous request and acknowledgement cycle. We employ probabilistic transmission of spikes to implement continuous-valued synaptic weights, and memory-based look-up tables to implement arbitrary interconnection topologies. The scheme is modular and scalable, and lends itself to the implementation of multi-chip network architectures. Results from a prototype system with 1024 analog VLSI integrate-and-fire neurons, each with up to 128 probabilistic synapses, demonstrate these concepts in an image processing task.

A programmable VLSI filter architecture for application in real-time vision processing systems.

An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach is valid for any 2D filtering operation as long as the convolutional kernel F(p,q) is decomposable into an x-axis and a y-axis component, i.e. F(p,q)=H(p)V(q), for some rotated coordinate system [p,q]. If it is possible to find a coordinate system [p,q], rotated with respect to the absolute coordinate system a certain angle, for which the above decomposition is possible, then the proposed architecture is able to perform the filtering operation for any angle we would like the kernel to be rotated. This is achieved by taking advantage of the AER and manipulating the addresses in real time. The proposed architecture, however, requires one approximation: the product operation between the horizontal component H(p) and vertical component V(q) should be able to be approximated by a signed minimum operation without significant performance degradation. It is shown that for edge-extraction applications this filter does not produce performance degradation. The proposed architecture is intended to be used in a complete vision system known as the Boundary-Contour-System and Feature-Contour-System Vision Model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and electrical simulation and experimental results at the circuit level operation of some critical subcircuits.

Voiced-speech representation by an analog silicon model of the auditory periphery.

An analog CMOS integration of a model for the auditory periphery is presented. The model consists of middle ear, basilar membrane, and hair cell/synapse modules which are derived from neurophysiological studies. The circuit realization of each module is discussed, and experimental data of each module's response to sinusoidal excitation are given. The nonlinear speech processing capabilities of the system are demonstrated using the voiced syllable |ba|. The multichannel output of the silicon model corresponds to the time-varying instantaneous firing rates of auditory nerve fibers that have different characteristic frequencies. These outputs are similar to the physiologically obtained responses. The actual implementation uses subthreshold CMOS technology and analog continuous-time circuits, resulting in a real-time, micropower device with potential applications as a preprocessor of auditory stimuli.

Current-mode subthreshold MOS circuits for analog VLSI neural systems.

An overview of the current-mode approach for designing analog VLSI neural systems in subthreshold CMOS technology is presented. Emphasis is given to design techniques at the device level using the current-controlled current conveyor and the translinear principle. Circuits for associative memory and silicon retina systems are used as examples. The design methodology and how it relates to actual biological microcircuits are discussed.