Low-Temperature Plasma-Assisted Atomic Layer Deposition of Silicon Nitride Moisture Permeation Barrier Layers.

Encapsulation of organic (opto-)electronic devices, such as organic light-emitting diodes (OLEDs), photovoltaic cells, and field-effect transistors, is required to minimize device degradation induced by moisture and oxygen ingress. SiNx moisture permeation barriers have been fabricated using a very recently developed low-temperature plasma-assisted atomic layer deposition (ALD) approach, consisting of half-reactions of the substrate with the precursor SiH2(NH(t)Bu)2 and with N2-fed plasma. The deposited films have been characterized in terms of their refractive index and chemical composition by spectroscopic ellipsometry (SE), X-ray photoelectron spectroscopy (XPS), and Fourier-transform infrared spectroscopy (FTIR). The SiNx thin-film refractive index ranges from 1.80 to 1.90 for films deposited at 80 °C up to 200 °C, respectively, and the C, O, and H impurity levels decrease when the deposition temperature increases. The relative open porosity content of the layers has been studied by means of multisolvent ellipsometric porosimetry (EP), adopting three solvents with different kinetic diameters: water (∼0.3 nm), ethanol (∼0.4 nm), and toluene (∼0.6 nm). Irrespective of the deposition temperature, and hence the impurity content in the SiNx films, no uptake of any adsorptive has been observed, pointing to the absence of open pores larger than 0.3 nm in diameter. Instead, multilayer development has been observed, leading to type II isotherms that, according to the IUPAC classification, are characteristic of nonporous layers. The calcium test has been performed in a climate chamber at 20 °C and 50% relative humidity to determine the intrinsic water vapor transmission rate (WVTR) of SiNx barriers deposited at 120 °C. Intrinsic WVTR values in the range of 10(-6) g/m2/day indicate excellent barrier properties for ALD SiNx layers as thin as 10 nm, competing with that of state-of-the-art plasma-enhanced chemical vapor-deposited SiNx layers of a few hundred nanometers in thickness.

Analysis of Nanoporosity in Moisture Permeation Barrier Layers by Electrochemical Impedance Spectroscopy.

Water permeation in inorganic moisture permeation barriers occurs through macroscale defects/pinholes and nanopores, the latter with size approaching the water kinetic diameter (0.27 nm). Both permeation paths can be identified by the calcium test, i.e., a time-consuming and expensive optical method for determining the water vapor transmission rate (WVTR) through barrier layers. Recently, we have shown that ellipsometric porosimetry (i.e., a combination of spectroscopic ellipsometry and isothermal adsorption studies) is a valid method to classify and quantify the nanoporosity and correlate it with the WVTR values. Nevertheless, no information is obtained about the macroscale defects or the kinetics of water permeation through the barrier, both essential in assessing the quality of the barrier layer. In this study, electrochemical impedance spectroscopy (EIS) is shown as a sensitive and versatile method to obtain information on nanoporosity and macroscale defects, water permeation, and diffusivity of moisture barrier layers, complementing the barrier property characterization obtained by means of EP and calcium test. EIS is performed on thin SiO2 barrier layers deposited by plasma enhanced-CVD. It allows the determination of the relative water uptake in the SiO2 layers, found to be in agreement with the nanoporosity content inferred by EP. Furthermore, the kinetics of water permeation is followed by EIS, and the diffusivity (D) is determined and found to be in accordance with literature values. Moreover, differently from EP, EIS data are shown to be sensitive to the presence of local macrodefects, correlated with the barrier failure during the calcium test.

Charge trapping by self-assembled monolayers as the origin of the threshold voltage shift in organic field-effect transistors.

The threshold voltage is an important property of organic field-effect transistors. By applying a self-assembled monolayer (SAM) on the gate dielectric, the value can be tuned. After electrical characterization, the semiconductor is delaminated. The surface potentials of the revealed SAM perfectly agree with the threshold voltages, which demonstrate that the shift is not due to the dipolar contribution, but due to charge trapping by the SAM.