Energy-filtered cold electron transport at room temperature.

Fermi-Dirac electron thermal excitation is an intrinsic phenomenon that limits functionality of various electron systems. Efforts to manipulate electron thermal excitation have been successful when the entire system is cooled to cryogenic temperatures, typically <1 K. Here we show that electron thermal excitation can be effectively suppressed at room temperature, and energy-suppressed electrons, whose energy distribution corresponds to an effective electron temperature of ~45 K, can be transported throughout device components without external cooling. This is accomplished using a discrete level of a quantum well, which filters out thermally excited electrons and permits only energy-suppressed electrons to participate in electron transport. The quantum well (~2 nm of Cr2O3) is formed between source (Cr) and tunnelling barrier (SiO2) in a double-barrier-tunnelling-junction structure having a quantum dot as the central island. Cold electron transport is detected from extremely narrow differential conductance peaks in electron tunnelling through CdSe quantum dots, with full widths at half maximum of only ~15 mV at room temperature.

CMOS-compatible fabrication of room-temperature single-electron devices.

Devices in which the transport and storage of single electrons are systematically controlled could lead to a new generation of nanoscale devices and sensors. The attractive features of these devices include operation at extremely low power, scalability to the sub-nanometre regime and extremely high charge sensitivity. However, the fabrication of single-electron devices requires nanoscale geometrical control, which has limited their fabrication to small numbers of devices at a time, significantly restricting their implementation in practical devices. Here we report the parallel fabrication of single-electron devices, which results in multiple, individually addressable, single-electron devices that operate at room temperature. This was made possible using CMOS fabrication technology and implementing self-alignment of the source and drain electrodes, which are vertically separated by thin dielectric films. We demonstrate clear Coulomb staircase/blockade and Coulomb oscillations at room temperature and also at low temperatures.