Low Thermal Budget Heteroepitaxial Gallium Oxide Thin Films Enabled by Atomic Layer Deposition.

This work explores the applicability of atomic layer deposition (ALD) in producing highly oriented crystalline gallium oxide films on foreign substrates at low thermal budgets. The effects of substrate, deposition temperature, and annealing process on formation of crystalline gallium oxide are discussed. The Ga2O3 films exhibited a strong preferred orientation on the c-plane sapphire substrate. The onset of formation of crystalline gallium oxide is determined, at which only two sets of planes, i.e., α-Ga2O3 (006) and ß-Ga2O3 (4̅02), are present parallel to the surface. More specifically, this work reports, for the first time, that epitaxial gallium oxide films on sapphire start to form at deposition temperatures ≥ 190 °C by using an optimized plasma-enhanced ALD process such that α-Ga2O3 (006)∥α-Al2O3 (006) and ß-Ga2O3 (2̅01)∥α-Al2O3 (006). Both α-Ga2O3 (006) and ß-Ga2O3 (2̅01) planes are polar planes (i.e., consisting of only one type of atom, either Ga or O) and, therefore, favorable to form by ALD at such low deposition temperatures. Ellipsometry and van der Pauw measurements confirmed that the crystalline films have optical and electrical properties close to bulk gallium oxide. The film grown at 277 °C was determined to have superior properties among as-deposited films. Using TEM to locate α-Ga2O3 and ß-Ga2O3 domains in the as-deposited crystalline films, we proposed a short annealing scheme to limit the development of α-Ga2O3 domains in the film and produce pure ß-Ga2O3 films via an energy-efficient process. A pure ß-Ga2O3 phase on sapphire with ß-Ga2O3 (2̅01)∥α-Al2O3 (006) was successfully achieved by using the proposed process at the low annealing temperature of 550 °C preceded by the low deposition temperature of 190 °C. The results of this work enable epitaxial growth of gallium oxide thin films, with superior material properties offered by ALD, not only with potential applications as a high-performance material in reducing global energy consumption but also with an energy-efficient fabrication process.

Understanding the Effects of a High Surface Area Nanostructured Indium Tin Oxide Electrode on Organic Solar Cell Performance.

Organic solar cells (OSCs) are a complex assembly of disparate materials, each with a precise function within the device. Typically, the electrodes are flat, and the device is fabricated through a layering approach of the interfacial layers and photoactive materials. This work explores the integration of high surface area transparent electrodes to investigate the possible role(s) a three-dimensional electrode could take within an OSC, with a BHJ composed of a donor-acceptor combination with a high degree of electron and hole mobility mismatch. Nanotree indium tin oxide (ITO) electrodes were prepared via glancing angle deposition, structures that were previously demonstrated to be single-crystalline. A thin layer of zinc oxide was deposited on the ITO nanotrees via atomic layer deposition, followed by a self-assembled monolayer of C60-based molecules that was bound to the zinc oxide surface through a carboxylic acid group. Infiltration of these functionalized ITO nanotrees with the photoactive layer, the bulk heterojunction comprising PC71BM and a high hole mobility low band gap polymer (PDPPTT-T-TT), led to families of devices that were analyzed for the effect of nanotree height. When the height was varied from 0 to 50, 75, 100, and 120 nm, statistically significant differences in device performance were noted with the maximum device efficiencies observed with a nanotree height of 75 nm. From analysis of these results, it was found that the intrinsic mobility mismatch between the donor and acceptor phases could be compensated for when the electron collection length was reduced relative to the hole collection length, resulting in more balanced charge extraction and reduced recombination, leading to improved efficiencies. However, as the ITO nanotrees increased in height and branching, the decrease in electron collection length was offset by an increase in hole collection length and potential deleterious electric field redistribution effects, resulting in decreased efficiency.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current.

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.