32-Channel transmit beamformer with high timing resolution for high-frequency ultrasound imaging systems.

This paper presents a 32-channel high timing resolution transmit-beamforming circuit for use in high-frequency ultrasound imaging systems. Conventional transmit-beamforming circuits are typically implemented using field-programmable gate array (FPGA) chips. However, it is difficult for FPGAs to provide high timing resolution to meet the beamforming requirements of high-frequency ultrasound imaging systems. The proposed transmit-beamforming design can generate stable and suitable delays to excite 32-channel array transducer elements without variations in the process, voltage, and temperature. In addition, the proposed low-complexity architecture can maintain the duty cycle of long prorogation signals with low hardware cost to meet the timing requirements of a large channel number array transducer. The proposed designed transmit beamformer uses 0.18-µm CMOS technology for a 30-MHz high-frequency linear array, and the simulation results show that the proposed transmit-beamforming application-specific integrated circuit can achieve a maximum time delay of 619.5 ns with a time resolution of 617 ps.

A high resolution on-chip delay sensor with low supply-voltage sensitivity for high-performance electronic systems.

An all-digital on-chip delay sensor (OCDS) circuit with high delay-measurement resolution and low supply-voltage sensitivity for efficient detection and diagnosis in high-performance electronic system applications is presented. Based on the proposed delay measurement scheme, the quantization resolution of the proposed OCDS can be reduced to several picoseconds. Additionally, the proposed cascade-stage delay measurement circuit can enhance immunity to supply-voltage variations of the delay measurement resolution without extra self-biasing or calibration circuits. Simulation results show that the delay measurement resolution can be improved to 1.2 ps; the average delay resolution variation is 0.55% with supply-voltage variations of ±10%. Moreover, the proposed delay sensor can be implemented in an all-digital manner, making it very suitable for high-performance electronic system applications as well as system-level integration.