Efficient Multiple Channels EEG Signal Classification Based on Hierarchical Extreme Learning Machine.

The human brain can be seen as one of the most powerful processors in the world, and it has a very complex structure with different kinds of signals for monitoring organics, communicating to neurons, and reacting to different information, which allows large developments in observing human sleeping, revealing diseases, reflecting certain motivations of limbs, and other applications. Relative theory, algorithms, and applications also help us to build brain-computer interface (BCI) systems for different powerful functions. Therefore, we present a fast-reaction framework based on an extreme learning machine (ELM) with multiple layers for the ElectroEncephaloGram (EEG) signals classification in motor imagery, showing the advantages in both accuracy of classification and training speed compared with conventional machine learning methods. The experiments are performed on software with the dataset of BCI Competition II with fast training time and high accuracy. The final average results show an accuracy of 93.90% as well as a reduction of 75% of the training time as compared to conventional deep learning and machine learning algorithms for EEG signal classification, also showing its prospects of the improvement of the performance of the BCI system.

Efficient and Automatic Breast Cancer Early Diagnosis System Based on the Hierarchical Extreme Learning Machine.

Breast cancer is the leading type of cancer in women, causing nearly 600,000 deaths every year, globally. Although the tumors can be localized within the breast, they can spread to other body parts, causing more harm. Therefore, early diagnosis can help reduce the risks of this cancer. However, a breast cancer diagnosis is complicated, requiring biopsy by various methods, such as MRI, ultrasound, BI-RADS, or even needle aspiration and cytology with the suggestions of specialists. On certain occasions, such as body examinations of a large number of people, it is also a large workload to check the images. Therefore, in this work, we present an efficient and automatic diagnosis system based on the hierarchical extreme learning machine (H-ELM) for breast cancer ultrasound results with high efficiency and make a primary diagnosis of the images. To make it compatible to use, this system consists of PNG images and general medical software within the H-ELM framework, which is easily trained and applied. Furthermore, this system only requires ultrasound images on a small scale, of 28×28 pixels, reducing the resources and fulfilling the application with low-resolution images. The experimental results show that the system can achieve 86.13% in the classification of breast cancer based on ultrasound images from the public breast ultrasound images (BUSI) dataset, without other relative information and supervision, which is higher than the conventional deep learning methods on the same dataset. Moreover, the training time is highly reduced, to only 5.31 s, and consumes few resources. The experimental results indicate that this system could be helpful for precise and efficient early diagnosis of breast cancers with primary examination results.

Machine Learning Based Hardware Architecture for DOA Measurement From Mice EEG.

OBJECTIVE: This research aims to design a hardware optimized machine learning based Depth of Anesthesia (DOA) measurement framework for mice and its FPGA implementation. METHODS: Electroencephalography or EEG signal is acquired from 16 mice in the Neural Interface Research (NIR) Laboratory of the City University of Hong Kong. We present a logistic regression based approach with mathematically uncomplicated feature extraction techniques for efficient hardware implementation to estimate the DOA. RESULTS: With the extraction of only two features, the proposed system can classify the state of consciousness with 94% accuracy for a 1 second EEG epoch, leading to a 100% accurate channel prediction after a 7 s run-time on average. CONCLUSION: Through performance evaluation and comparative study confirmed the efficacy of the prototype. SIGNIFICANCE: DOA is the measure of consciousness to distinguish whether a patient is suitably anesthetized or not during a surgical procedure. Traditionally the DOA is estimated by checking biophysical responses of a patient during the surgery. However, the physical symptoms can be misleading for a decisive conclusion due to the patient's health condition or as a side-effect of anesthetic drugs. Recently, several neuroscientific research works are correlating the EEG signal with conscious states, which is likely to have less interference with the patient's medical condition. This research presents the first-of-its-kind hardware implemented automatic DOA computation system for mice.

Elastic Net Constraint-Based Tensor Model for High-Order Graph Matching.

The procedure of establishing the correspondence between two sets of feature points is important in computer vision applications. In this article, an elastic net constraint-based tensor model is proposed for high-order graph matching. To control the tradeoff between the sparsity and the accuracy of the matching results, an elastic net constraint is introduced into the tensor-based graph matching model. Then, a nonmonotone spectral projected gradient (NSPG) method is derived to solve the proposed matching model. During the optimization of using NSPG, we propose an algorithm to calculate the projection on the feasible convex sets of elastic net constraint. Further, the global convergence of solving the proposed model using the NSPG method was proved. The superiority of the proposed method is verified through experiments on the synthetic data and natural images.

Reconfigurable Architecture for Multi-lead ECG Signal Compression with High-frequency Noise Reduction.

Electrocardiogram (ECG) is a record of the heart's electrical activity over a specified period, and it is the most popular noninvasive diagnostic test to identify several cardiac diseases. It is an integral part of a typical eHealth system, where the ECG signals are often needed to be compressed for long term data recording and remote transmission. Reconfigurable architecture offers high-speed parallel computation unit, particularly the Field Programmable Gate Array (FPGA) along with adaptable software features. Hence, this type of design is suitable for multi-channel signal processing units like ECGs, which usually require precise real-time computation. This paper presents a reconfigurable signal processing unit which is implemented in ZedBoard- a development board for Xilinx Zynq -7000 SoC. The compression algorithm is based on Fast Fourier Transformation. The implemented system can work in real-time and achieve a maximum 90% compression rate without any significant signal distortion (i.e., less than 9% normalized percentage of root-mean-square deviation). This compression rate is 5% higher than the state-of-the-art hardware implementation. Additionally, this algorithm has an inherent capability of high-frequency noise reduction, which makes it unique in this field. The confirmatory analysis is done using six databases from the PhysioNet databank to compare and validate the effectiveness of the proposed system.

Unsupervised and real-time spike sorting chip for neural signal processing in hippocampal prosthesis.

BACKGROUND: Damage to the hippocampus will result in the loss of ability to form new long-term memories and cognitive disorders. At present, there is no effective medical treatment for this issue. Hippocampal cognitive prosthesis is proposed to replace damaged regions of the hippocampus to mimic the function of original biological tissue. This prosthesis requires a spike sorter to detect and classify spikes in the recorded neural signal. NEW METHOD: A 16-channel spike sorting processor is presented in this paper, where all channels are considered as independent. An automatic threshold estimation method suitable for hardware implementation is proposed for the Osort clustering algorithm. A new distance metric is also introduced to facilitate clustering. Bayes optimal template matching classification algorithm is optimized to reduce computational complexity by introducing a preselection mechanism. RESULTS: The chip was fabricated in 40-nm CMOS process with a core area of 0.0175 mm2/ch and power consumption of 19.0 µW/ch. Synthetic and realistic test data are used to evaluate the chip. The test result shows that it has high performance on both data. COMPARISON WITH EXISTING METHOD(S): Compared with the other three spike sorting processors, the proposed chip achieves the highest detection and classification accuracy. It also has the ability to deal with partially overlapping spikes, which is not reported in the other work. CONCLUSIONS: We have developed a 16-channel spike sorting chip used in hippocampal prosthesis, which provides unsupervised clustering and real-time detection and classification. It also has the ability to deal with partially overlapping spikes.

ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis.

A hippocampal prosthesis is a very large scale integration (VLSI) biochip that needs to be implanted in the biological brain to solve a cognitive dysfunction. In this letter, we propose a novel low-complexity, small-area, and low-power programmable hippocampal neural network application-specific integrated circuit (ASIC) for a hippocampal prosthesis. It is based on the nonlinear dynamical model of the hippocampus: namely multi-input, multi-output (MIMO)-generalized Laguerre-Volterra model (GLVM). It can realize the real-time prediction of hippocampal neural activity. New hardware architecture, a storage space configuration scheme, low-power convolution, and gaussian random number generator modules are proposed. The ASIC is fabricated in 40 nm technology with a core area of 0.122 mm[Formula: see text] and test power of 84.4 [Formula: see text]W. Compared with the design based on the traditional architecture, experimental results show that the core area of the chip is reduced by 84.94% and the core power is reduced by 24.30%.

An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics.

Neural coding is an essential process for neuroprosthetic design, in which adaptive filters have been widely utilized. In a practical application, it is needed to switch between different filters, which could be based on continuous observations or point process, when the neuron models, conditions, or system requirements have changed. As candidates of coding chip for neural prostheses, low-power general purpose processors are not computationally efficient especially for large scale neural population coding. Application specific integrated circuits (ASICs) do not have flexibility to switch between different adaptive filters while the cost for design and fabrication is formidable. In this research work, we explore an application specific instruction set processor (ASIP) for adaptive filters in neural decoding activity. The proposed architecture focuses on efficient computation for the most time-consuming matrix/vector operations among commonly used adaptive filters, being able to provide both flexibility and throughput. Evaluation and implementation results are provided to demonstrate that the proposed ASIP design is area-efficient while being competitive to commercial CPUs in computational performance.

Laguerre-Volterra model and architecture for MIMO system identification and output prediction.

A generalized mathematical model is proposed for behaviors prediction of biological causal systems with multiple inputs and multiple outputs (MIMO). The system properties are represented by a set of model parameters, which can be derived with random input stimuli probing it. The system calculates predicted outputs based on the estimated parameters and its novel inputs. An efficient hardware architecture is established for this mathematical model and its circuitry has been implemented using the field-programmable gate arrays (FPGAs). This architecture is scalable and its functionality has been validated by using experimental data gathered from real-world measurement.

A customizable stochastic state point process filter (SSPPF) for neural spiking activity.

Stochastic State Point Process Filter (SSPPF) is effective for adaptive signal processing. In particular, it has been successfully applied to neural signal coding/decoding in recent years. Recent work has proven its efficiency in non-parametric coefficients tracking in modeling of mammal nervous system. However, existing SSPPF has only been realized in commercial software platforms which limit their computational capability. In this paper, the first hardware architecture of SSPPF has been designed and successfully implemented on field-programmable gate array (FPGA), proving a more efficient means for coefficient tracking in a well-established generalized Laguerre-Volterra model for mammalian hippocampal spiking activity research. By exploring the intrinsic parallelism of the FPGA, the proposed architecture is able to process matrices or vectors with random size, and is efficiently scalable. Experimental result shows its superior performance comparing to the software implementation, while maintaining the numerical precision. This architecture can also be potentially utilized in the future hippocampal cognitive neural prosthesis design.

Real-time prediction of neuronal population spiking activity using FPGA.

A field-programmable gate array (FPGA)-based hardware architecture is proposed and utilized for prediction of neuronal population firing activity. The hardware system adopts the multi-input multi-output (MIMO) generalized Laguerre-Volterra model (GLVM) structure to describe the nonlinear dynamic neural process of mammalian brain and can switch between the two important functions: estimation of GLVM coefficients and prediction of neuronal population spiking activity (model outputs). The model coefficients are first estimated using the in-sample training data; then the output is predicted using the out-of-sample testing data and the field estimated coefficients. Test results show that compared with previous software implementation of the generalized Laguerre-Volterra algorithm running on an Intel Core i7-2620M CPU, the FPGA-based hardware system can achieve up to 2.66×10(3) speedup in doing model parameters estimation and 698.84 speedup in doing model output prediction. The proposed hardware platform will facilitate research on the highly nonlinear neural process of the mammal brain, and the cognitive neural prosthesis design.

A dual mode FPGA design for the hippocampal prosthesis.

One important step towards the cognitive neural prosthesis design is to achieve real-time prediction of neuronal firing pattern. An FPGA-based hardware computational platform is designed to guarantee this hard real-time signal processing requirement. The proposed platform can work in dual modes: generalized Laguerre-Volterra model parameters estimation and output prediction, and can switch between these two important system functions. Compared with the traditional software-based platform implemented in C, the hardware platform achieves better efficiency in doing the biocomputations by up to thousandfold speedup in this process.

A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities.

A parallelized and pipelined architecture based on FPGA and a higher-level Self Reconfiguration Platform are proposed in this paper to model Generalized Laguerre-Volterra MIMO system essential in identifying the time-varying neural dynamics underlying spike activities. Our proposed design is based on the Xilinx Virtex-6 FPGA platform and the processing core can produce data samples at a speed of 1.33 × 10(6)/s, which is 3.1 × 10(3) times faster than the corresponding C model running on an Intel i7-860 Quad Core Processor. The ongoing work of the construction of the advanced Self Reconfiguration Platform is presented and initial test results are provided.