A Split-Gate Positive Feedback Device With an Integrate-and-Fire Capability for a High-Density Low-Power Neuron Circuit.

Hardware-based spiking neural networks (SNNs) to mimic biological neurons have been reported. However, conventional neuron circuits in SNNs have a large area and high power consumption. In this work, a split-gate floating-body positive feedback (PF) device with a charge trapping capability is proposed as a new neuron device that imitates the integrate-and-fire function. Because of the PF characteristic, the subthreshold swing (SS) of the device is less than 0.04 mV/dec. The super-steep SS of the device leads to a low energy consumption of ∼0.25 pJ/spike for a neuron circuit (PF neuron) with the PF device, which is ∼100 times smaller than that of a conventional neuron circuit. The charge storage properties of the device mimic the integrate function of biological neurons without a large membrane capacitor, reducing the PF neuron area by about 17 times compared to that of a conventional neuron. We demonstrate the successful operation of a dense multiple PF neuron system with reset and lateral inhibition using a common self-controller in a neuron layer through simulation. With the multiple PF neuron system and the synapse array, on-line unsupervised pattern learning and recognition are successfully performed to demonstrate the feasibility of our PF device in a neural network.

Analysis of Current Fluctuation Due to Trap and Percolation Path in Nano-Scale Bulk FinFET.

An electron in the channel can be trapped into the trap inside gate oxide and detrapped into the channel, resulting in the fluctuation in drain current. To investigate the drain current fluctuation (ΔI(D)) caused by trapping/detrapping of an electron in 22 nm bulk FinFET, 3-D device simulation was performed extensively. The ΔI(D) is changed by changing the position of the trap in the gate oxide along the surface of fin body. In the bulk FinFET, the trap located near the center of side surface of the fin body gives the larger ΔI(D) compared to those of the traps located at the top center, top corner, and side bottom. At a fixed trap position, the shallower trap depth (x(T)) from the interface between the gate oxide and the fin body gives the lager ΔI(D). With decreasing fin width (W(fin)) and fin height (H(fin)), the ΔI(D) increases. Especially, decreasing H(fin) increases ΔI(D) significantly. As the trap is close to a percolation path, the ΔI(D) also increases.