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1.
ACS Appl Mater Interfaces ; 15(8): 10812-10819, 2023 Mar 01.
Artigo em Inglês | MEDLINE | ID: mdl-36802479

RESUMO

Heterogeneous integration of monolayers is an emergent route of spatially combining materials with available platforms for unprecedented properties. A long-standing challenge along this route is to manipulate interfacial configurations of each unit in stacking architecture. A monolayer of transition metal dichalcogenides (TMDs) offers an embodiment of studying interface engineering of integrated systems because optoelectronic performances generally trade off with each other due to interfacial trap states. While ultrahigh photoresponsivity of TMDs phototransistors has been realized, a long response time commonly appears and hinders applications. Here, fundamental processes in excitation and relaxation of the photoresponse are studied and correlated with interfacial traps of the monolayer MoS2. A mechanism for the onset of saturation photocurrent and the reset behavior in the monolayer photodetector is illustrated based on device performances. Electrostatic passivation of interfacial traps is achieved with the bipolar gate pulse and significantly reduces the response time for photocurrent to reach saturated states. This work paves the way toward fast-speed and ultrahigh-gain devices of stacked two-dimensional monolayers.

2.
Nanoscale Res Lett ; 17(1): 34, 2022 Mar 14.
Artigo em Inglês | MEDLINE | ID: mdl-35286495

RESUMO

Moiré lattice in artificially stacked monolayers of two-dimensional (2D) materials effectively modulates the electronic structures of materials, which is widely highlighted. Formation of the electronic Moiré superlattice promises the prospect of uniformity among different moiré cells across the lattice, enabling a new platform for novel properties, such as unconventional superconductivity, and scalable quantum emitters. Recently, epitaxial growth of the monolayer transition metal dichalcogenide (TMD) is achieved on the sapphire substrate by chemical vapor deposition (CVD) to realize scalable growth of highly-oriented monolayers. However, fabrication of the scalable Moiré lattice remains challenging due to the lack of essential manipulation of the well-aligned monolayers for clean interface quality and precise twisting angle control. Here, scalable and highly-oriented monolayers of TMD are realized on the sapphire substrates by using the customized CVD process. Controlled growth of the epitaxial monolayers is achieved by promoting the rotation of the nuclei-like domains in the initial growth stage, enabling aligned domains for further grain growth in the steady-state stage. A full coverage and distribution of the highly-oriented domains are verified by second-harmonic generation (SHG) microscopy. By developing the method for clean monolayer manipulation, hetero-stacked bilayer (epi-WS2/epi-MoS2) is fabricated with the specific angular alignment of the two major oriented monolayers at the edge direction of 0°/ ± 60°. On account of the optimization for scalable Moiré lattice with a high-quality interface, the observation of interlayer exciton at low temperature illustrates the feasibility of scalable Moiré superlattice based on the oriented monolayers.

3.
Adv Mater ; 30(7)2018 Feb.
Artigo em Inglês | MEDLINE | ID: mdl-29271505

RESUMO

Recently, monolayers of van der Waals materials, including transition metal dichalcogenides (TMDs), are considered ideal building blocks for constructing 2D artificial lattices and heterostructures. Heterostructures with multijunctions of more than two monolayer TMDs are intriguing for exploring new physics and materials properties. Obtaining in-plane heterojunctions of monolayer TMDs with atomically sharp interfaces is very significant for fundamental research and applications. Currently, multistep synthesis for more than two monolayer TMDs remains a challenge because decomposition or compositional alloying is thermodynamically favored at the high growth temperature. Here, a multistep chemical vapor deposition (CVD) synthesis of the in-plane multijunctions of monolayer TMDs is presented. A low growth temperature synthesis is developed to avoid compositional fluctuations of as-grown TMDs, defects formations, and interfacial alloying for high heterointerface quality and thermal stability of monolayer TMDs. With optimized parameters, atomically sharp interfaces are successfully achieved in the synthesis of in-plane artificial lattices of the WS2 /WSe2 /MoS2 at reduced growth temperatures. Growth behaviors as well as the heterointerface quality are carefully studied in varying growth parameters. Highly oriented strain patterns are found in the second harmonic generation imaging of the TMD multijunctions, suggesting that the in-plane heteroepitaxial growth may induce distortion for unique material symmetry.

4.
Nano Lett ; 16(10): 6349-6356, 2016 10 12.
Artigo em Inglês | MEDLINE | ID: mdl-27633942

RESUMO

Two-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.

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