Your browser doesn't support javascript.
loading
Mostrar: 20 | 50 | 100
Resultados 1 - 2 de 2
Filtrar
Mais filtros










Base de dados
Intervalo de ano de publicação
1.
Sensors (Basel) ; 22(8)2022 Apr 09.
Artigo em Inglês | MEDLINE | ID: mdl-35458869

RESUMO

Testing is an important part of the design flow in the semiconductor industry. Unfortunately, it also consumes up to half of the production cost. On-silicon stimulus generators and response analyzers can be integrated with the Device-Under-Test (DUT) to reduce production costs with a minimum increment in power and area consumption. This practice is known as the Built-In Self-Test (BIST). This work presents a single-tone generator for BIST applications that is based on the Harmonic-Canceling (HC) technique. The main idea is to cancel or filter out the harmonics of a square-wave signal in order to obtain a highly pure sine wave. The design challenges of this technique are the precise implementation of irrational coefficients in silicon and the strong dependence of the output's linearity on the coefficients' precision. In order to reduce this dependence, this work introduces an irrational coefficient generator that is based on the recursive use of special matrices called skew-circulant matrices (SCMs). A complete study of the SCM-based HC synthesizer, its properties, and the proposed implementation in 180 nm CMOS technology are presented. The measured results show that the proposed HC synthesizer is able to filter out up to the 47th harmonic of a given square wave and to generate signals from 0.8 to 100 MHz with a maximum Spurious-Free Dynamic Range (SFDR) of 66 dB.

2.
Sensors (Basel) ; 11(11): 10940-57, 2011.
Artigo em Inglês | MEDLINE | ID: mdl-22346681

RESUMO

We present an alternative post-processing on a CMOS chip to release a planar microelectrode array (pMEA) integrated with its signal readout circuit, which can be used for monitoring the neuronal activity of vestibular ganglion neurons in newborn Wistar strain rats. This chip is fabricated through a 0.6 µm CMOS standard process and it has 12 pMEA through a 4 × 3 electrodes matrix. The alternative CMOS post-process includes the development of masks to protect the readout circuit and the power supply pads. A wet etching process eliminates the aluminum located on the surface of the p+ -type silicon. This silicon is used as transducer for recording the neuronal activity and as interface between the readout circuit and neurons. The readout circuit is composed of an amplifier and tunable bandpass filter, which is placed on a 0.015 mm2 silicon area. The tunable bandpass filter has a bandwidth of 98 kHz and a common mode rejection ratio (CMRR) of 87 dB. These characteristics of the readout circuit are appropriate for neuronal recording applications.


Assuntos
Análise em Microsséries/instrumentação , Microeletrodos , Semicondutores , Potenciais de Ação/fisiologia , Amplificadores Eletrônicos , Animais , Animais Recém-Nascidos , Células Cultivadas , Fenômenos Eletrofisiológicos/fisiologia , Teste de Materiais , Análise em Microsséries/métodos , Microscopia Eletrônica de Varredura , Microtecnologia/métodos , Neurônios/fisiologia , Técnicas de Patch-Clamp , Ratos , Ratos Wistar , Silício/química , Transistores Eletrônicos , Nervo Vestibular/citologia
SELEÇÃO DE REFERÊNCIAS
DETALHE DA PESQUISA
...