A low-power, low-noise neural-signal amplifier circuit in 90-nm CMOS.

A fully-differential low-power low-noise preamplifier for biopotential and neural-recording applications is presented. This design, which has been simulated in a standard 90-nm CMOS process, consumes 30 microW from a 3-V power supply. The simulated integrated input-referred noise is 2.3 microV over 0.1 Hz to 20 kHz. The amplifier also provides an output swing of +/- 0.9 V with a THD of less than 0.1%