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1.
Nano Lett ; 9(10): 3592-8, 2009 Oct.
Artigo em Inglês | MEDLINE | ID: mdl-19824707

RESUMO

Coexistence of metallic and semiconducting carbon nanotubes in as-grown samples sets important limits to their application in high-performance electronics. We present the metal-to-semiconductor conversion of carbon nanotubes for field-effect transistors based on both aligned nanotubes and individual nanotube devices. The conversion process is induced by light irradiation, scalable to wafer-size scales and capable of yielding improvements in the channel-current on/off ratio up to 5 orders of magnitude in nanotube-based field-effect transistors. Inactivation of metallic nanotubes in the channels was achieved as a consequence of a diameter-dependent photochemical process that led to a controlled oxidation of the nanotube sidewall and, hence, stronger localization of pi-electrons. Optimization of irradiation conditions yields nearly 90% of depletable nanotube field-effect transistors.

2.
Nano Lett ; 9(1): 189-97, 2009 Jan.
Artigo em Inglês | MEDLINE | ID: mdl-19086836

RESUMO

Massive aligned carbon nanotubes hold great potential but also face significant integration/assembly challenges for future beyond-silicon nanoelectronics. We report a wafer-scale processing of aligned nanotube devices and integrated circuits, including progress on essential technological components such as wafer-scale synthesis of aligned nanotubes, wafer-scale transfer of nanotubes to silicon wafers, metallic nanotube removal and chemical doping, and defect-tolerant integrated nanotube circuits. We have achieved synthesis of massive aligned nanotubes on complete 4 in. quartz and sapphire substrates, which were then transferred to 4 in. Si/SiO(2) wafers. CMOS analogous fabrication was performed to yield transistors and circuits with features down to 0.5 mum, with high current density approximately 20 muA/mum and good on/off ratios. In addition, chemical doping has been used to build fully integrated complementary inverter with a gain approximately 5, and a defect-tolerant design has been employed for NAND and NOR gates. This full-wafer approach could serve as a critical foundation for future integrated nanotube circuits.


Assuntos
Cristalização/métodos , Nanotecnologia/instrumentação , Nanotubos/química , Nanotubos/ultraestrutura , Transistores Eletrônicos , Desenho Assistido por Computador , Condutividade Elétrica , Desenho de Equipamento , Análise de Falha de Equipamento , Substâncias Macromoleculares/química , Teste de Materiais , Miniaturização , Conformação Molecular , Nanotecnologia/métodos , Tamanho da Partícula , Reprodutibilidade dos Testes , Semicondutores , Sensibilidade e Especificidade , Propriedades de Superfície
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