Thermoelectric transport properties of Si, SiGe, and silicide CMOS-compatible thin films.

Characterization of thermoelectric transport properties for temperature sensing, cooling, and energy harvesting applications is necessary for a reliable device performance in progressively minimized computer chips. In this contribution, we present a fully automated thermovoltage and sheet resistance measurement setup, which is calibrated and tested for the production of silicon- and silicon-germanium-doped as well as silicide complementary metal-oxide-semiconductor-compatible thin films. A LabVIEW-programmed software application automatically controls the measurement and recording of thermovoltages at individually defined temperature set points. The setup maps average temperature and temperature differences simultaneously in the regime from 40 to 70 °C. The Seebeck coefficient calculated by means of the inversion method was used to eliminate the offset voltage influence. Finally, we present and discuss the Seebeck coefficient as well as the sheet resistance for application-specific different temperature set points of several doped poly-Si, poly-SiGe, and silicides.

Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications.

This article reports an improvement in the performance of the hafnium oxide-based (HfO2) ferroelectric field-effect transistors (FeFET) achieved by a synergistic approach of interfacial layer (IL) engineering and READ-voltage optimization. FeFET devices with silicon dioxide (SiO2) and silicon oxynitride (SiON) as IL were fabricated and characterized. Although the FeFETs with SiO2 interfaces demonstrated better low-frequency characteristics compared to the FeFETs with SiON interfaces, the latter demonstrated better WRITE endurance and retention. Finally, the neuromorphic simulation was conducted to evaluate the performance of FeFETs with SiO2 and SiON IL as synaptic devices. We observed that the WRITE endurance in both types of FeFETs was insufficient to carry out online neural network training. Therefore, we consider an inference-only operation with offline neural network training. The system-level simulation reveals that the impact of systematic degradation via retention degradation is much more significant for inference-only operation than low-frequency noise. The neural network with FeFETs based on SiON IL in the synaptic core shows 96% accuracy for the inference operation on the handwritten digit from the Modified National Institute of Standards and Technology (MNIST) data set in the presence of flicker noise and retention degradation, which is only a 2.5% deviation from the software baseline.

A FeFET with a novel MFMFIS gate stack: towards energy-efficient and ultrafast NVMs for neuromorphic computing.

The discovery of ferroelectricity in the fluorite structure based hafnium oxide (HfO2) material sparked major efforts for reviving the ferroelectric field effect transistor (FeFET) memory concept. A Novel metal-ferroelectric-metal-ferroelectric-insulator-semiconductor (MFMFIS) FeFET memory is reported based on dual ferroelectric integration as an MFM and MFIS in a single gate stack using Si-doped Hafnium oxide (HSO) ferroelectric (FE) material. The MFMFIS top and bottom electrode contacts, dual HSO based ferroelectric layers, and tailored MFM to MFIS area ratio (AR-TB) provide a flexible stack structure tuning for improving the FeFET performance. The AR-TB tuning shows a tradeoff between the MFM voltage increase and the weaker FET Si channel inversion, particularly notable in the drain saturation currentID(sat)when the AR-TB ratio decreases. Dual HSO ferroelectric layer integration enables a maximized memory window (MW) and dynamic control of its size by tuning the MFM to MFIS switching contribution through the AR-TB change. The stack structure control via the AR-TB tuning shows further merits in terms of a low voltage switching for a saturated MW size, an extremely linear at wide dynamic range of the current update, as well as high symmetry in the long term synaptic potentiation and depression. The MFMFIS stack reliability is reported in terms of the switching variability, temperature dependence, endurance, and retention. The MFMFIS concept is thoroughly discussed revealing profound insights on the optimal MFMFIS stack structure control for enhancing the FeFET memory performance.