Integration of nanoimprint lithography with block copolymer directed self-assembly for fabrication of a sub-20 nm template for bit-patterned media.

We propose a novel strategy to integrate the nanoimprint lithography (NIL) technique with directed self-assembly (DSA) of block copolymer (BCP) for providing a robust, high-yield, and low-defect-density path to sub-20 nm dense patterning. Through this new NIL-DSA method, UV nanoimprint resist is used as the DSA copolymer pre-pattern to expedite the DSA process. This method was successfully used to fabricate a 1.0 Td in(-2) servo-integrated nanoimprint template for bit-patterned media (BPM) application. The fabricated template was used for UV-cure NIL on a 2.5-inch disk. The imprint resist patterns were further transferred into the underlying CoCrPt magnetic layer through a carbon hard mask using ion beam etching. The successful integration of the NIL technique with the DSA process provides us with a new route to BPM nanofabrication, which includes the following three major advantages: (1) a simpler and faster way to implement DSA for high-density BPM patterning; (2) a novel method for fabricating a high-quality dot pattern template through an iterative imprint-DSA-template procedure; and (3) an uncomplicated integration scheme for implementing non-periodic servo features with BCP patterns, thus accelerating the transition of moving the DSA technique from laboratory research to the BPM manufacturing environment.

Low-temperature plasma etching of high aspect-ratio densely packed 15 to sub-10 nm silicon features derived from PS-PDMS block copolymer patterns.

The combination of block copolymer (BCP) lithography and plasma etching offers a gateway to densely packed sub-10 nm features for advanced nanotechnology. Despite the advances in BCP lithography, plasma pattern transfer remains a major challenge. We use controlled and low substrate temperatures during plasma etching of a chromium hard mask and then the underlying substrate as a route to high aspect ratio sub-10 nm silicon features derived from BCP lithography. Siloxane masks were fabricated using poly(styrene-b-siloxane) (PS-PDMS) BCP to create either line-type masks or, with the addition of low molecular weight PS-OH homopolymer, dot-type masks. Temperature control was essential for preventing mask migration and controlling the etched feature's shape. Vertical silicon wire features (15 nm with feature-to-feature spacing of 26 nm) were etched with aspect ratios up to 17 : 1; higher aspect ratios were limited by the collapse of nanoscale silicon structures. Sub-10 nm fin structures were etched with aspect ratios greater than 10 : 1. Transmission electron microscopy images of the wires reveal a crystalline silicon core with an amorphous surface layer, just slightly thicker than a native oxide.