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1.
Phys Rev Lett ; 114(6): 066101, 2015 Feb 13.
Artigo em Inglês | MEDLINE | ID: mdl-25723230

RESUMO

High-density packing in organic crystals is usually associated with an increase of the coordination between molecules. Such a concept is not necessarily extended to two-dimensional molecular networks self-assembled on a solid surface, for which we demonstrate the key role of the surface in inducing the optimal packing. By a combination of scanning tunneling microscopy experiments and multiscale computer simulations, we study the phase transition between two polymorphs. We find that, contrary to intuition, the structure with the lowest packing fraction corresponds to the highest molecular coordination number, due to the competition between surface and intermolecular forces. Having the lowest free energy, this structure spreads out as the most stable polymorph over a wide range of molecular concentrations.

2.
Nano Lett ; 14(10): 5636-40, 2014 Oct 08.
Artigo em Inglês | MEDLINE | ID: mdl-25244561

RESUMO

Carrier multiplication (CM), the creation of electron-hole pairs from an excited electron, has been investigated in a silicon p-n junction by multiple probe scanning tunneling microscopy. The technique enables an unambiguous determination of the quantum yield based on the direct measurement of both electron and hole currents that are generated by hot tunneling electrons. The combined effect of impact ionization, carrier diffusion, and recombination is directly visualized from the spatial mapping of the CM efficiency. Atomically well-ordered areas of the p-n junction surface sustain the highest CM rate, demonstrating the key role of the surface in reaching high yield.

3.
Nanotechnology ; 24(49): 495301, 2013 Dec 13.
Artigo em Inglês | MEDLINE | ID: mdl-24231577

RESUMO

Silicon nanostructure patterning with tight geometry control is an important challenge at the bottom level. In that context, stress based controlled oxidation appears to be an efficient tool for precise nanofabrication. Here, we investigate the stress-retarded oxidation phenomenon in various silicon nanostructures (nanobeams, nanorings and nanowires) at both the experimental and the theoretical levels. Different silicon nanostructures have been fabricated by a top-down approach. Complex dependence of the stress build-up on the nano-object's dimension, shape and size has been demonstrated experimentally and physically explained by modelling. For the oxidation of a two-dimensional nanostructure (nanobeam), relative independence to size effects has been observed. On the other hand, radial stress increase with geometry downscaling of a one-dimensional nanostructure (nanowire) has been carefully emphasized. The study of shape engineering by retarded oxidation effects for vertical silicon nanowires is finally discussed.

4.
Nano Lett ; 12(7): 3545-50, 2012 Jul 11.
Artigo em Inglês | MEDLINE | ID: mdl-22694664

RESUMO

We investigate electron and hole mobilities in strained silicon nanowires (Si NWs) within an atomistic tight-binding framework. We show that the carrier mobilities in Si NWs are very responsive to strain and can be enhanced or reduced by a factor >2 (up to 5×) for moderate strains in the ± 2% range. The effects of strain on the transport properties are, however, very dependent on the orientation of the nanowires. Stretched 100 Si NWs are found to be the best compromise for the transport of both electrons and holes in ≈10 nm diameter Si NWs. Our results demonstrate that strain engineering can be used as a very efficient booster for NW technologies and that due care must be given to process-induced strains in NW devices to achieve reproducible performances.

5.
Nano Lett ; 11(11): 4520-6, 2011 Nov 09.
Artigo em Inglês | MEDLINE | ID: mdl-21967002

RESUMO

We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stored charge leakage is induced not only by quantum effects but also by the conduction-band offset that arises between Ge and Si. The dimensions and position of each floating gate are well-defined and controlled. The devices exhibit a long retention time and single-electron injection at room temperature.


Assuntos
Armazenamento e Recuperação da Informação , Nanotecnologia/instrumentação , Semicondutores , Processamento de Sinais Assistido por Computador/instrumentação , Transferência de Energia , Desenho de Equipamento , Análise de Falha de Equipamento , Eletricidade Estática
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