Enhanced near-infrared photodetection via whispering gallery modes in the wave-shaped sidewall silicon nanopillar arrays.

We demonstrate a near-infrared (NIR) photodiode (PD) by using a wave-shaped sidewall silicon nanopillars (WS-SiNPs) structure. The designed WS sidewall nanostructure increases the horizontal component of incident light and induces multiple whispering-gallery modes with low-quality factor, which increases the light absorption path. Thus, the WS-SiNP PD shows improved spectral responsivity and external quantum efficiency over straight sidewall silicon nanopillars and planar PDs in the NIR region. Especially, the peak responsivity of 0.648 A/W is achieved at a wavelength of 905 nm, which is used for light detection and ranging. Comparison with commercial photodiodes demonstrates the good optoelectrical characteristics of the fabricated device. The improved characteristics are validated by 3D finite differential time domain simulations. Based on these results, our device shows the potential for cost-effective Si-based optoelectronic devices to be utilized in future advanced applications.

Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory.

Three-terminal (3-T) thyristor random-access memory is explored for a next-generation high-density nanoscale vertical cross-point array. The effects of standby voltages on the device are thoroughly investigated in terms of gate-cathode voltage (VGC,ST) and anode-cathode voltage (VAC,ST) in the standby state for superior data retention characteristics and low-power operation. The device with the optimized VGC,ST of - 0.4 V and VAC,ST of 0.6 V shows the continuous data retention capability without refresh operation with a low standby current of 1.14 pA. In addition, a memory array operation scheme of 3-T TRAM is proposed to address array disturbance issues. The presented array operation scheme can efficiently minimize program, erase and read disturbances on unselected cells by adjusting gate-cathode voltage. The standby voltage turns out to be beneficial to improve retention characteristics: over 10 s. With the proposed memory array operation, 3-T TRAM can provide excellent data retention characteristics and high-density memory configurations comparable with or surpass conventional dynamic random-access memory (DRAM) technology.

Breakdown Voltage Enhancement in AlGaN/GaN High-Electron Mobility Transistor by Optimizing Gate Field-Plate Structure.

We optimize various gate head structures to improve breakdown voltage characteristics of AlGaN/GaN high-electron mobility transistors by a two-dimensional device simulator based on a T-shaped gate-connected field-plate. Field-plates (FPs) alleviate electric field spikes near the gate and drain-side overlapping edges, which eventually disperse electron avalanche and charge trapping effects. Hence, the more uniform electric field distribution provides improved breakdown voltage of the device. Multiple configurations, such as extension of the FP towards the source or drain, and symmetric extension, were investigated and compared. The best results were acquired when the FP was extended towards the drain, with an optimum length of 2 µm, which produced maximum breakdown voltage of 224 V and maximum transconductance of 132.5 mS/mm. Also, the optimum Si3N4 passivation layer thickness based on a T-shaped gate-connected FP structure was 50 nm.

DC Characteristics of AlGaN/GaN High-Electron Mobility Transistor with a Bottom Plate Connected to Source-Bridged Field Plate Structure.

We investigate DC characteristics of AlGaN/GaN high-electron mobility transistors by using a source-bridged field plate and additional bottom plate (BP) structure. The analysis of experimental data was performed with a two-dimensional simulator. Source connected BP structure stabilized threshold voltage and transconductance regardless of various drain voltages. The effect of BP location was also analyzed, which had optimal DC values because of the dependence of breakdown voltage and drain current of the device on BP position between gate and drain. Finally, the optimum distance of 0.8 µm from drain side gate head edge to BP was achieved for optimum DC characteristics and the highest breakdown voltage of 341 V.

Thermal Analysis of AlGaN/GaN High-Electron-Mobility Transistor and Its RF Power Efficiency Optimization with Source-Bridged Field-Plate Structure.

In this study, we consider the relationship between the temperature in a two-dimensional electron gas (2-DEG) channel layer and the RF characteristics of an AlGaN/GaN high-electron-mobility transistor by changing the geometrical structure of the field-plate. The final goal is to achieve a high power efficiency by decreasing the channel layer temperature. First, simulations were performed to compare and contrast the experimental data of a conventional T-gate head structure. Then, a source-bridged field-plate (SBFP) structure was used to obtain the lower junction temperature in the 2-DEG channel layer. The peak electric field intensity was reduced, and a decrease in channel temperature resulted in an increase in electron mobility. Furthermore, the gate-to-source capacitance was increased by the SBFP structure. However, under the large current flow condition, the SBFP structure had a lower maximum temperature than the basic T-gate head structure, which improved the device electron mobility. Eventually, an optimum position of the SBFP was used, which led to higher frequency responses and improved the breakdown voltages. Hence, the optimized SBFP structure can be a promising candidate for high-power RF devices.