Strong Rashba parameter of two-dimensional electron gas at CaZrO3/SrTiO3 heterointerface.

We synthesized a CaZrO3/SrTiO3 oxide heterostructure, which can serve as an alternative to LaAlO3/SrTiO3, and confirmed the generation of 2-dimensional electron gas (2-DEG) at the heterointerface. We analyzed the electrical-transport properties of the 2-DEG to elucidate its intrinsic characteristics. Based on the magnetic field dependence of resistance at 2 K, which exhibited Weak Anti-localization (WAL) behaviors, the fitted Rashba parameter values were found to be about 12-15 × 10-12 eV*m. These values are stronger than the previous reported Rashba parameters obtained from the 2-DEGs in other heterostructure systems and several layered 2D materials. The observed strong spin-orbit coupling (SOC) is attributed to the strong internal electric field generated by the lattice mismatch between the CaZrO3 layer and SrTiO3 substrate. This pioneering strong SOC of the 2-DEG at the CaZrO3/SrTiO3 heterointerface may play a pivotal role in the developing future metal oxide-based quantum nanoelectronics devices.

Hysteretic temperature dependence of resistance controlled by gate voltage in LaAlO3/SrTiO3 heterointerface electron system.

For two-dimensional electron gas device applications, it is important to understand how electrical-transport properties are controlled by gate voltage. Here, we report gate voltage-controllable hysteresis in the resistance-temperature characteristics of two-dimensional electron gas at LaAlO3/SrTiO3 heterointerface. Electron channels made of the LaAlO3/SrTiO3 heterointerface showed hysteretic resistance-temperature behavior: the measured resistance was significantly higher during upward temperature sweeps in thermal cycling tests. Such hysteretic behavior was observed only after application of positive back-gate voltages below 50 K in the thermal cycle, and the magnitude of hysteresis increased with the applied back-gate voltage. To explain this gate-controlled resistance hysteresis, we propose a mechanism based on electron trapping at impurity sites, in conjunction with the strong temperature-dependent dielectric constant of the SrTiO3 substrate. Our model explains well the observed gate-controlled hysteresis of the resistance-temperature characteristics, and the mechanism should be also applicable to other SrTiO3-based oxide systems, paving the way to applications of oxide heterostructures to electronic devices.