RESUMO
The fabrication of high-performance solid-state silicon quantum-devices requires high resolution patterning with minimal substrate damage. We have fabricated room temperature (RT) single-electron transistors (SETs) based on point-contact tunnel junctions using a hybrid lithography tool capable of both high resolution thermal scanning probe lithography and high throughput direct laser writing. The best focal z-position and the offset of the tip- and the laser-writing positions were determined in situ with the scanning probe. We demonstrate <100 nm precision in the registration between the high resolution and high throughput lithographies. The SET devices were fabricated on degenerately doped n-type >1020/cm3 silicon on insulator chips using a CMOS compatible geometric oxidation process. The characteristics of the three devices investigated were dominated by the presence of Si nanocrystals or phosphorous atoms embedded within the SiO2, forming quantum dots (QDs). The small size and strong localisation of electrons on the QDs facilitated SET operation even at RT. Temperature measurements showed that in the range 300 K > T > â¼100 K, the current flow was thermally activated but at <100 K, it was dominated by tunnelling.
RESUMO
Single nanometre scale quantum dots (QDs) have significant potential for many 'beyond CMOS' nanoelectronics and quantum computation applications. The fabrication and measurement of few nanometre silicon point-contact QD single-electron transistors are reported, which both operate at room temperature (RT) and are fabricated using standard processes. By combining thin silicon-on-insulator wafers, specific device geometry, and controlled oxidation, <10 nm nanoscale point-contact channels are defined. In this limit of the point-contact approach, ultra-small, few nanometre scale QDs are formed, enabling RT measurement of the full QD characteristics, including excited states to be made. A remarkably large QD electron addition energy â¼0.8 eV, and a quantum confinement energy â¼0.3 eV, are observed, implying a QD only â¼1.6 nm in size. In measurements of 19 RT devices, the extracted QD radius lies within a narrow band, from 0.8 to 2.35 nm, emphasising the single-nanometre scale of the QDs. These results demonstrate that with careful control, 'beyond CMOS' RT QD transistors can be produced using current 'conventional' semiconductor device fabrication techniques.