Chemical Vapor Deposition Growth of Graphene on 200 mm Ge(110)/Si Wafers and Ab Initio Analysis of Differences in Growth Mechanisms on Ge(110) and Ge(001).

For the fabrication of modern graphene devices, uniform growth of high-quality monolayer graphene on wafer scale is important. This work reports on the growth of large-scale graphene on semiconducting 8 inch Ge(110)/Si wafers by chemical vapor deposition and a DFT analysis of the growth process. Good graphene quality is indicated by the small FWHM (32 cm-1) of the Raman 2D band, low intensity ratio of the Raman D and G bands (0.06), and homogeneous SEM images and is confirmed by Hall measurements: high mobility (2700 cm2/Vs) and low sheet resistance (800 Ω/sq). In contrast to Ge(001), Ge(110) does not undergo faceting during the growth. We argue that Ge(001) roughens as a result of vacancy accumulation at pinned steps, easy motion of bonded graphene edges across (107) facets, and low energy cost to expand Ge area by surface vicinals, but on Ge(110), these mechanisms do not work due to different surface geometries and complex reconstruction.

Towards the Growth of Hexagonal Boron Nitride on Ge(001)/Si Substrates by Chemical Vapor Deposition.

The growth of hexagonal boron nitride (hBN) on epitaxial Ge(001)/Si substrates via high-vacuum chemical vapor deposition from borazine is investigated for the first time in a systematic manner. The influences of the process pressure and growth temperature in the range of 10-7-10-3 mbar and 900-980 °C, respectively, are evaluated with respect to morphology, growth rate, and crystalline quality of the hBN films. At 900 °C, nanocrystalline hBN films with a lateral crystallite size of ~2-3 nm are obtained and confirmed by high-resolution transmission electron microscopy images. X-ray photoelectron spectroscopy confirms an atomic N:B ratio of 1 ± 0.1. A three-dimensional growth mode is observed by atomic force microscopy. Increasing the process pressure in the reactor mainly affects the growth rate, with only slight effects on crystalline quality and none on the principle growth mode. Growth of hBN at 980 °C increases the average crystallite size and leads to the formation of 3-10 well-oriented, vertically stacked layers of hBN on the Ge surface. Exploratory ab initio density functional theory simulations indicate that hBN edges are saturated by hydrogen, and it is proposed that partial de-saturation by H radicals produced on hot parts of the set-up is responsible for the growth.

Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors.

Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics.

Investigation of the Oxidation Behavior of Graphene/Ge(001) Versus Graphene/Ge(110) Systems.

The oxidation behavior of Ge(001) and Ge(110) surfaces underneath the chemical vapor deposition (CVD)-grown graphene films has been investigated experimentally and interpreted on the basis of ab initio calculations. Freshly grown samples were exposed to air for more than 7 months and periodically monitored by X-ray photoelectron spectroscopy, scanning electron microscopy, and Raman spectroscopy. The oxidation of Ge(110) started with incubation time of several days, during which the oxidation rate was supposedly exponential. After an ultrathin oxide grew, the oxidation continued with a slow but constant rate. No incubation was detected for Ge(001). The oxide thickness was initially proportional to the square root of time. After 2 weeks, the rate saturated at a value fivefold higher than that for Ge(110). We argue that after the initial phase, the oxidation is limited by the diffusion of oxidizing species through atomic-size openings at graphene domain boundaries and is influenced by the areal density and by the structural quality of the boundaries, whereby the latter determines the initial behavior. Prolonged exposure affected the surface topography and reduced the strain in graphene. In the last step, both the air-exposed samples were annealed in vacuum at 850 °C. This removed oxygen from the substrate and restored the samples to their initial state. These findings might constitute an important step toward further optimization of graphene grown on Ge.

Graphene Schottky Junction on Pillar Patterned Silicon Substrate.

A graphene/silicon junction with rectifying behaviour and remarkable photo-response was fabricated by transferring a graphene monolayer on a pillar-patterned Si substrate. The device forms a 0.11 eV Schottky barrier with 2.6 ideality factor at room temperature and exhibits strongly bias- and temperature-dependent reverse current. Below room temperature, the reverse current grows exponentially with the applied voltage because the pillar-enhanced electric field lowers the Schottky barrier. Conversely, at higher temperatures, the charge carrier thermal generation is dominant and the reverse current becomes weakly bias-dependent. A quasi-saturated reverse current is similarly observed at room temperature when the charge carriers are photogenerated under light exposure. The device shows photovoltaic effect with 0.7% power conversion efficiency and achieves 88 A/W photoresponsivity when used as photodetector.

Current Modulation of a Heterojunction Structure by an Ultra-Thin Graphene Base Electrode.

Graphene has been proposed as the current controlling element of vertical transport in heterojunction transistors, as it could potentially achieve high operation frequencies due to its metallic character and 2D nature. Simulations of graphene acting as a thermionic barrier between the transport of two semiconductor layers have shown cut-off frequencies larger than 1 THz. Furthermore, the use of n-doped amorphous silicon, (n)-a-Si:H, as the semiconductor for this approach could enable flexible electronics with high cutoff frequencies. In this work, we fabricated a vertical structure on a rigid substrate where graphene is embedded between two differently doped (n)-a-Si:H layers deposited by very high frequency (140 MHz) plasma-enhanced chemical vapor deposition. The operation of this heterojunction structure is investigated by the two diode-like interfaces by means of temperature dependent current-voltage characterization, followed by the electrical characterization in a three-terminal configuration. We demonstrate that the vertical current between the (n)-a-Si:H layers is successfully controlled by the ultra-thin graphene base voltage. While current saturation is yet to be achieved, a transconductance of ~230 µ S was obtained, demonstrating a moderate modulation of the collector-emitter current by the ultra-thin graphene base voltage. These results show promising progress towards the application of graphene base heterojunction transistors.

Perfluorodecyltrichlorosilane-based seed-layer for improved chemical vapour deposition of ultrathin hafnium dioxide films on graphene.

We investigate the use of perfluorodecyltrichlorosilane-based self-assembled monolayer as seeding layer for chemical vapour deposition of HfO2 on large area CVD graphene. The deposition and evolution of the FDTS-based seed layer is investigated by X-ray photoelectron spectroscopy, Auger electron spectroscopy, and transmission electron microscopy. Crystalline quality of graphene transferred from Cu is monitored during formation of the seed layer as well as the HfO2 growth using Raman spectroscopy. We demonstrate that FDTS-based seed layer significantly improves nucleation of HfO2 layers so that graphene can be coated in a conformal way with HfO2 layers as thin as 10 nm. Proof-of-concept experiments on 200 mm wafers presented here validate applicability of the proposed approach to wafer scale graphene device fabrication.

Graphene growth on Ge(100)/Si(100) substrates by CVD method.

The successful integration of graphene into microelectronic devices is strongly dependent on the availability of direct deposition processes, which can provide uniform, large area and high quality graphene on nonmetallic substrates. As of today the dominant technology is based on Si and obtaining graphene with Si is treated as the most advantageous solution. However, the formation of carbide during the growth process makes manufacturing graphene on Si wafers extremely challenging. To overcome these difficulties and reach the set goals, we proposed growth of high quality graphene layers by the CVD method on Ge(100)/Si(100) wafers. In addition, a stochastic model was applied in order to describe the graphene growth process on the Ge(100)/Si(100) substrate and to determine the direction of further processes. As a result, high quality graphene was grown, which was proved by Raman spectroscopy results, showing uniform monolayer films with FWHM of the 2D band of 32 cm(-1).

Residual metallic contamination of transferred chemical vapor deposited graphene.

Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etching and electrochemical delamination methods with respect to residual submonolayer metallic contaminations. Regardless of the transfer method and associated cleaning scheme, time-of-flight secondary ion mass spectrometry and total reflection X-ray fluorescence measurements indicate that the graphene sheets are contaminated with residual metals (copper, iron) with a concentration exceeding 10(13) atoms/cm(2). These metal impurities appear to be partially mobile upon thermal treatment, as shown by depth profiling and reduction of the minority charge carrier diffusion length in the silicon substrate. As residual metallic impurities can significantly alter electronic and electrochemical properties of graphene and can severely impede the process of integration with silicon microelectronics, these results reveal that further progress in synthesis, handling, and cleaning of graphene is required to advance electronic and optoelectronic applications.