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1.
Artigo em Inglês | MEDLINE | ID: mdl-38868495

RESUMO

To combat the large variability problem in RRAM, current compliance elements are commonly used to limit the in-rush current during the forming operation. Regardless of the compliance element (1R-1R or 1T-1R), some degree of current overshoot is unavoidable. The peak value of the overshoot current is often used as a predictive metric of the filament characteristics and is linked to the parasitic capacitance of the test structure. The reported detrimental effects of higher parasitic capacitance seem to support this concept. However, this understanding is inconsistent with the recent successes of compliance-free ultra-short pulse forming which guarantees a maximum peak overshoot current. We use detailed circuit analysis and experimental measurements of 1R-1R and 1T-1R structures to show that the peak overshoot is independent of the parasitic capacitance while the overshoot duration is strongly dependent on the parasitic capacitance. Forming control can be achieved, in ultra-short pulse forming, since the overshoot duration is always less than the applied pulse duration. The demonstrated success of ultra-short pulse forming becomes easier to reconcile after identifying the importance of overshoot duration.

2.
IEEE Electron Device Lett ; 38(6): 736-739, 2017 Jun.
Artigo em Inglês | MEDLINE | ID: mdl-28890601

RESUMO

The stochastic nature of the conductive filaments in oxide-based resistive memory (RRAM) represents a sizeable impediment to commercialization. As such, program-verify methodologies are highly alluring. However, it was recently shown that program-verify methods are unworkable due to strong resistance state relaxation after SET/RESET programming. In this paper, we demonstrate that resistance state relaxation is not the main culprit. Instead, it is fluctuation-induced false-reading (triggering) that defeats the program-verify method, producing a large distribution tail immediately after programming. The fluctuation impact on the verify mechanism has serious implications on the overall write/erase speed of RRAM.

3.
IEEE Trans Electron Devices ; 63(10): 3851-3856, 2016 Oct.
Artigo em Inglês | MEDLINE | ID: mdl-28579633

RESUMO

We report a new technique for the rapid measurement of full capacitance-voltage (C-V) characteristic curves. The displacement current from a 100 MHz applied sine-wave, which swings from accumulation to strong inversion, is digitized directly using an oscilloscope from the metal-oxide-semiconductor (MOS) capacitor under test. A C-V curve can be constructed directly from this data but is severely distorted due to non-ideal behavior of real measurement systems. The key advance of this work is to extract the system response function using the same measurement set-up and a known MOS capacitor. The system response correction to the measured C-V curve of the unknown MOS capacitor can then be done by simple deconvolution. No de-skewing and/or leakage current correction is necessary, making it a very simple and quick measurement. Excellent agreement between the new fast C-V method and C-V measured conventionally by an LCR meter is achieved. The total time required for measurement and analysis is approximately 2 seconds, which is limited by our equipment.

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