Patternable Process-Induced Strain in 2D Monolayers and Heterobilayers.

Strain engineering in two-dimensional (2D) materials is a powerful but difficult to control approach to tailor material properties. Across applications, there is a need for device-compatible techniques to design strain within 2D materials. This work explores how process-induced strain engineering, commonly used by the semiconductor industry to enhance transistor performance, can be used to pattern complex strain profiles in monolayer MoS2 and 2D heterostructures. A traction-separation model is identified to predict strain profiles and extract the interfacial traction coefficient of 1.3 ± 0.7 MPa/µm and the damage initiation threshold of 16 ± 5 nm. This work demonstrates the utility to (1) spatially pattern the optical band gap with a tuning rate of 91 ± 1 meV/% strain and (2) induce interlayer heterostrain in MoS2-WSe2 heterobilayers. These results provide a CMOS-compatible approach to design complex strain patterns in 2D materials with important applications in 2D heterogeneous integration into CMOS technologies, moiré engineering, and confining quantum systems.

An Atomistic Insight into Moiré Reconstruction in Twisted Bilayer Graphene beyond the Magic Angle.

Twisted bilayer graphene exhibits electronic properties strongly correlated with the size and arrangement of moiré patterns. While rigid rotation of the two graphene layers results in a moiré interference pattern, local rearrangements of atoms due to interlayer van der Waals interactions result in atomic reconstruction within the moiré cells. Manipulating these patterns by controlling the twist angle and externally applied strain provides a promising route to tuning their properties. Atomic reconstruction has been extensively studied for angles close to or smaller than the magic angle (θ m = 1.1°). However, this effect has not been explored for applied strain and is believed to be negligible for high twist angles. Using interpretive and fundamental physical measurements, we use theoretical and numerical analyses to resolve atomic reconstruction in angles above θ m . In addition, we propose a method to identify local regions within moiré cells and track their evolution with strain for a range of representative high twist angles. Our results show that atomic reconstruction is actively present beyond the magic angle, and its contribution to the moiré cell evolution is significant. Our theoretical method to correlate local and global phonon behavior further validates the role of reconstruction at higher angles. Our findings provide a better understanding of moiré reconstruction in large twist angles and the evolution of moiré cells under the application of strain, which might be potentially crucial for twistronics-based applications.

Strain-based room-temperature non-volatile MoTe2 ferroelectric phase change transistor.

The primary mechanism of operation of almost all transistors today relies on the electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on' state to a non-conducting 'off' state. As transistors continue to scale down to increase computational performance, physical limitations from nanoscale field-effect operation begin to cause undesirable current leakage, which is detrimental to the continued advancement of computing1,2. Using a fundamentally different mechanism of operation, we show that through nanoscale strain engineering with thin films and ferroelectrics the transition metal dichalcogenide MoTe2 can be reversibly switched with electric-field-induced strain between the 1T'-MoTe2 (semimetallic) phase to a semiconducting MoTe2 phase in a field-effect transistor geometry. This alternative mechanism for transistor switching sidesteps all the static and dynamic power consumption problems in conventional field-effect transistors3,4. Using strain, we achieve large non-volatile changes in channel conductivity (Gon/Goff ≈ 107 versus Gon/Goff ≈ 0.04 in the control device) at room temperature. Ferroelectric devices offer the potential to reach sub-nanosecond non-volatile strain switching at the attojoule/bit level5-7, with immediate applications in ultrafast low-power non-volatile logic and memory8 while also transforming the landscape of computational architectures because conventional power, speed and volatility considerations for microelectronics may no longer exist.