Drinkable in situ-forming tough hydrogels for gastrointestinal therapeutics.

Pills are a cornerstone of medicine but can be challenging to swallow. While liquid formulations are easier to ingest, they lack the capacity to localize therapeutics with excipients nor act as controlled release devices. Here we describe drug formulations based on liquid in situ-forming tough (LIFT) hydrogels that bridge the advantages of solid and liquid dosage forms. LIFT hydrogels form directly in the stomach through sequential ingestion of a crosslinker solution of calcium and dithiol crosslinkers, followed by a drug-containing polymer solution of alginate and four-arm poly(ethylene glycol)-maleimide. We show that LIFT hydrogels robustly form in the stomachs of live rats and pigs, and are mechanically tough, biocompatible and safely cleared after 24 h. LIFT hydrogels deliver a total drug dose comparable to unencapsulated drug in a controlled manner, and protect encapsulated therapeutic enzymes and bacteria from gastric acid-mediated deactivation. Overall, LIFT hydrogels may expand access to advanced therapeutics for patients with difficulty swallowing.

Sequential electronic and structural transitions in VO2 observed using X-ray absorption spectromicroscopy.

The popular dual electronic and structural transitions in VO2 are explored using X-ray absorption spectromicroscopy with high spatial and spectral resolutions. It is found that during both heating and cooling, the electronic transition always precedes the structural Peierls transition. Between the two transitions, there are intermediate states that are spectrally isolated here.

Phase transitions enable computational universality in neuristor-based cellular automata.

We recently demonstrated that Mott memristors, two-terminal devices that exhibit threshold switching via an insulator to conductor phase transition, can serve as the active components necessary to build a neuristor, a biomimetic threshold spiking device. Here we extend those results to demonstrate, in simulation, neuristor-based circuits capable of performing general Boolean logic operations. We additionally show that these components can be used to construct a one-dimensional cellular automaton, rule 137, previously proven to be universal. This proof-of-principle shows that localized phase transitions can perform spiking computation, which is of particular interest for neuromorphic hardware.

Local temperature redistribution and structural transition during joule-heating-driven conductance switching in VO2.

Joule-heating induced conductance-switching is studied in VO2 , a Mott insulator. Complementary in situ techniques including optical characterization, blackbody microscopy, scanning transmission X-ray microscopy (STXM) and numerical simulations are used. Abrupt redistribution in local temperature is shown to occur upon conductance-switching along with a structural phase transition, at the same current.

A scalable neuristor built with Mott memristors.

The Hodgkin-Huxley model for action potential generation in biological axons is central for understanding the computational capability of the nervous system and emulating its functionality. Owing to the historical success of silicon complementary metal-oxide-semiconductors, spike-based computing is primarily confined to software simulations and specialized analogue metal-oxide-semiconductor field-effect transistor circuits. However, there is interest in constructing physical systems that emulate biological functionality more directly, with the goal of improving efficiency and scale. The neuristor was proposed as an electronic device with properties similar to the Hodgkin-Huxley axon, but previous implementations were not scalable. Here we demonstrate a neuristor built using two nanoscale Mott memristors, dynamical devices that exhibit transient memory and negative differential resistance arising from an insulating-to-conducting phase transition driven by Joule heating. This neuristor exhibits the important neural functions of all-or-nothing spiking with signal gain and diverse periodic spiking, using materials and structures that are amenable to extremely high-density integration with or without silicon transistors.

Sub-100 fJ and sub-nanosecond thermally driven threshold switching in niobium oxide crosspoint nanodevices.

We built and measured the dynamical current versus time behavior of nanoscale niobium oxide crosspoint devices which exhibited threshold switching (current-controlled negative differential resistance). The switching speeds of 110 × 110 nm(2) devices were found to be Δt(ON) = 700 ps and Δt(OFF) = 2:3 ns while the switching energies were of the order of 100 fJ. We derived a new dynamical model based on the Joule heating rate of a thermally driven insulator-to-metal phase transition that accurately reproduced the experimental results, and employed the model to estimate the switching time and energy scaling behavior of such devices down to the 10 nm scale. These results indicate that threshold switches could be of practical interest in hybrid CMOS nanoelectronic circuits.

Continuous electrical tuning of the chemical composition of TaO(x)-based memristors.

TaO(x)-based memristors have recently demonstrated both subnanosecond resistance switching speeds and very high write/erase switching endurance. Here we show that the physical state variable that enables these properties is the oxygen concentration in a conduction channel, based on the measurement of the thermal coefficient of resistance of different TaO(x) memristor states and a set of reference Ta-O films of known composition. The continuous electrical tunability of the oxygen concentration in the channel, with a resolution of a few percent, was demonstrated by controlling the write currents with a one transistor-one memristor (1T1M) circuit. This study demonstrates that solid-state chemical kinetics is important for the determination of the electrical characteristics of this relatively new class of device.

Impact of geometry on the performance of memristive nanodevices.

We examined the influence of memristor geometry on switching endurance by comparing ribbed and planar TiO(2)-based cross-point devices with 50 nm × 50 nm lateral dimensions. We observed that planar devices exhibited a factor of over four improvement in median endurance value over ribbed structures for otherwise identical structures. Our simulations indicated that the corners in the upper wires of the ribbed devices experienced higher current density and more heating during device forming and switching, and hence a shorter life time.

Lognormal switching times for titanium dioxide bipolar memristors: origin and resolution.

We measured the switching time statistics for a TiO(2) memristor and found that they followed a lognormal distribution, which is a potentially serious problem for computer memory and data storage applications. We examined the underlying physical phenomena that determine the switching statistics and proposed a simple analytical model for the distribution based on the drift/diffusion equation and previously measured nonlinear drift behavior. We designed a closed-loop switching protocol that dramatically narrows the time distribution, which can significantly improve memory circuit performance and reliability.

A memristor-based nonvolatile latch circuit.

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

The mechanism of electroforming of metal oxide memristive switches.

Metal and semiconductor oxides are ubiquitous electronic materials. Normally insulating, oxides can change behavior under high electric fields--through 'electroforming' or 'breakdown'--critically affecting CMOS (complementary metal-oxide-semiconductor) logic, DRAM (dynamic random access memory) and flash memory, and tunnel barrier oxides. An initial irreversible electroforming process has been invariably required for obtaining metal oxide resistance switches, which may open urgently needed new avenues for advanced computer memory and logic circuits including ultra-dense non-volatile random access memory (NVRAM) and adaptive neuromorphic logic circuits. This electrical switching arises from the coupled motion of electrons and ions within the oxide material, as one of the first recognized examples of a memristor (memory-resistor) device, the fourth fundamental passive circuit element originally predicted in 1971 by Chua. A lack of device repeatability has limited technological implementation of oxide switches, however. Here we explain the nature of the oxide electroforming as an electro-reduction and vacancy creation process caused by high electric fields and enhanced by electrical Joule heating with direct experimental evidence. Oxygen vacancies are created and drift towards the cathode, forming localized conducting channels in the oxide. Simultaneously, O(2-) ions drift towards the anode where they evolve O(2) gas, causing physical deformation of the junction. The problematic gas eruption and physical deformation are mitigated by shrinking to the nanoscale and controlling the electroforming voltage polarity. Better yet, electroforming problems can be largely eliminated by engineering the device structure to remove 'bulk' oxide effects in favor of interface-controlled electronic switching.

Memristive switching mechanism for metal/oxide/metal nanodevices.

Nanoscale metal/oxide/metal switches have the potential to transform the market for nonvolatile memory and could lead to novel forms of computing. However, progress has been delayed by difficulties in understanding and controlling the coupled electronic and ionic phenomena that dominate the behaviour of nanoscale oxide devices. An analytic theory of the 'memristor' (memory-resistor) was first developed from fundamental symmetry arguments in 1971, and we recently showed that memristor behaviour can naturally explain such coupled electron-ion dynamics. Here we provide experimental evidence to support this general model of memristive electrical switching in oxide systems. We have built micro- and nanoscale TiO2 junction devices with platinum electrodes that exhibit fast bipolar nonvolatile switching. We demonstrate that switching involves changes to the electronic barrier at the Pt/TiO2 interface due to the drift of positively charged oxygen vacancies under an applied electric field. Vacancy drift towards the interface creates conducting channels that shunt, or short-circuit, the electronic barrier to switch ON. The drift of vacancies away from the interface annilihilates such channels, recovering the electronic barrier to switch OFF. Using this model we have built TiO2 crosspoints with engineered oxygen vacancy profiles that predictively control the switching polarity and conductance.

Experimental demonstration of a defect-tolerant nanocrossbar demultiplexer.

Ultradense memory and logic circuits fabricated at local densities exceeding 100 × 10(9) cross-points per cm(2) have recently been demonstrated with nanowire crossbar arrays. Practical implementation of such nanocrossbar circuitry, however, requires effective demultiplexing to solve the problem of electrically addressing individual nanowires within an array. Importantly, such a demultiplexer (demux) must also be tolerant of the potentially high defect rates inherent to nanoscale circuit fabrication. We have built a 50 nm half-pitch nanocrossbar circuit using imprint lithography and configured it for a demux application. Utilizing a class of Hamming codes in the hardware design, we experimentally demonstrate defect-tolerant demux operations on a 12 × 8 nanocrossbar array with up to two stuck-open defects per addressed line.