Content-Addressable Memories and Transformable Logic Circuits Based on Ferroelectric Reconfigurable Transistors for In-Memory Computing.

As a promising alternative to the von Neumann architecture, in-memory computing holds the promise of delivering a high computing capacity while consuming low power. In this paper, we show that the ferroelectric reconfigurable transistor can serve as a versatile logic-in-memory unit that can perform logic operations and data storage concurrently. When functioning as memory, a ferroelectric reconfigurable transistor can implement content-addressable memory (CAM) with a 1-transistor-per-bit density. With the switchable polarity of the ferroelectric reconfigurable transistor, XOR/XNOR-like matching operation in CAM is realized in a single transistor, which can offer a significant improvement in area and energy efficiency compared to conventional CAMs. NAND- and NOR-arrays of CAMs are also demonstrated, which enable multibit matching in a single reading operation. In addition, the NOR array of CAM cells effectively measures the Hamming distance between the input query and the stored entries. When functioning as a logic element, a ferroelectric reconfigurable transistor can be switched between n- and p-type modes. Utilizing the switchable polarity of these ferroelectric Schottky barrier transistors, we demonstrate reconfigurable logic gates with NAND/NOR dual functions, whose input-output mapping can be transformed in real time without changing the layout, and the configuration is nonvolatile.

Low-Thermal-Budget Ferroelectric Field-Effect Transistors Based on CuInP2S6 and InZnO.

In this paper, we demonstrate low-thermal-budget ferroelectric field-effect transistors (FeFETs) based on the two-dimensional ferroelectric CuInP2S6 (CIPS) and oxide semiconductor InZnO (IZO). The CIPS/IZO FeFETs exhibit nonvolatile memory windows of ∼1 V, low off-state drain currents, and high carrier mobilities. The ferroelectric CIPS layer serves a dual purpose by providing electrostatic doping in IZO and acting as a passivation layer for the IZO channel. We also investigate the CIPS/IZO FeFETs as artificial synaptic devices for neural networks. The CIPS/IZO synapse demonstrates a sizable dynamic ratio (125) and maintains stable multilevel states. Neural networks based on CIPS/IZO FeFETs achieve an accuracy rate of over 80% in recognizing MNIST handwritten digits. These ferroelectric transistors can be vertically stacked on silicon complementary metal-oxide semiconductor (CMOS) with a low thermal budget, offering broad applications in CMOS+X technologies and energy-efficient 3D neural networks.

Nonvolatile Reconfigurable 2D Schottky Barrier Transistors.

Nonvolatile reconfigurable transistors can be used to implement highly flexible and compact logic circuits with low power consumption in maintaining the configuration. In this paper, we build nonvolatile reconfigurable transistors based on 2D CuInP2S6/MoTe2 heterostructures. The ferroelectric polarization-induced electron and hole doping in the heterostructure are investigated. By introducing the ferroelectric doping into the source/drain contacts, we demonstrate reconfigurable Schottky barrier transistors, whose polarity (n-type or p-type) can be dynamically programmed, where the configuration is nonvolatile in nature. These transistors exhibit a tunable photoresponse, where the n-n doping state leads to negative photocurrent, whereas the p-p doping state gives rise to a positive photocurrent. The transistor with asymmetric (n-p or p-n) contacts exhibits a strong photovoltaic effect. These reconfigurable logic and optoelectronic transistors will enable a new type of device fabric for future computing systems and sensing networks.

Voltage controlled Néel vector rotation in zero magnetic field.

Multi-functional thin films of boron (B) doped Cr2O3 exhibit voltage-controlled and nonvolatile Néel vector reorientation in the absence of an applied magnetic field, H. Toggling of antiferromagnetic states is demonstrated in prototype device structures at CMOS compatible temperatures between 300 and 400 K. The boundary magnetization associated with the Néel vector orientation serves as state variable which is read via magnetoresistive detection in a Pt Hall bar adjacent to the B:Cr2O3 film. Switching of the Hall voltage between zero and non-zero values implies Néel vector rotation by 90 degrees. Combined magnetometry, spin resolved inverse photoemission, electric transport and scanning probe microscopy measurements reveal B-dependent TN and resistivity enhancement, spin-canting, anisotropy reduction, dynamic polarization hysteresis and gate voltage dependent orientation of boundary magnetization. The combined effect enables H = 0, voltage controlled, nonvolatile Néel vector rotation at high-temperature. Theoretical modeling estimates switching speeds of about 100 ps making B:Cr2O3 a promising multifunctional single-phase material for energy efficient nonvolatile CMOS compatible memory applications.