Rethinking the Characterization of Nanoscale Field-Effect Transistors: A Universal Approach.

Standard methods for calculating transport parameters in nanoscale field-effect transistors (FETs), namely carrier concentration and mobility, require a linear connection between the gate voltage and channel conductance; however, this is often not the case. One reason often overlooked is that shifts in chemical and electric potential can partially compensate each other, commonly referred to as quantum capacitance. In nanoscale FETs, capacitance is often unmeasurable and an analytical formula is required, which assumes the conducting channel as metallic and common methods of determining threshold voltage no longer couple properly into transport equations. As present and future FET structures become smaller and have increased channel-gate coupling, this issue will render standard methods impossible to use. This work discusses the validity of common methods of characterization for nanoscale FETs, develops a universal model to determine transport properties by only measuring the threshold voltage of an FET and presents a new parameter to easily classify FETs as either quantum capacitance-limited or metallic approximated charge transport. Also considered in this work is electrical hysteresis from trap states and, in combination with the proposed universal model, novel techniques are introduced to measure and remove the errors associated with these effects often ignored in literature.

Surface State Dynamics Dictating Transport in InAs Nanowires.

Because of their high aspect ratio, nanostructures are particularly susceptible to effects from surfaces such as slow electron trapping by surface states. However, nonequilibrium trapping dynamics have been largely overlooked when considering transport in nanoelectronic devices. In this study, we demonstrate the profound influence of dynamic trapping processes on transport in InAs nanowires through an investigation of the hysteretic and time-dependent behavior of the transconductance. We observe large densities (∼1013 cm-2) of slow surface traps and demonstrate the ability to control and permanently fix their occupation and charge through electrostatic manipulation by the gate potential followed by thermal deactivation by cryogenic cooling. Furthermore, we observe a transition from enhancement- to depletion-mode and a 400% change in field-effect mobility within the same device when the initial gate voltage and sweep rate are varied, revealing the severe impact of electrostatic history and dynamics on InAs nanowire field-effect transistors. A time-dependent model for nanowire transconductance based on nonequilibrium carrier population dynamics with thermally activated capture and emission was constructed and showed excellent agreement with experiments, confirming the effects to be a direct result of the dynamics of slow surface traps characterized by large thermal activation barriers (∼ 700 meV). This work reveals a clear and direct link between the electrical conductivity and the microscopic interactions of charged species with nanowire surfaces and highlights the necessity for considering dynamic properties of surface states in nanoelectronic devices.

Surface Properties from Transconductance in Nanoscale Systems.

Because of the continued scaling of transistor dimensions and incorporation of nanostructured materials into modern electronic and optoelectronic devices, surfaces and interfaces have become a dominant factor dictating material properties and device performance. In this study, we investigate the temperature-dependent electronic transport properties of InAs nanowire field-effect transistors. A point where the nanowire conductance becomes independent of temperature is observed, known as the zero-temperature-coefficient. The distribution of surface states is determined by a spectral analysis of the conductance activation energy and used to develop a carrier transport model that explains the existence and gate voltage dependence of this point. We determine that the position of this point in gate voltage is directly related to the fixed oxide charge on the nanowire surface and demonstrate the utility of this method for studying surface passivations in nanoscale systems by characterizing (NH4)2Sx and H2 plasma surface treatments on InAs nanowires.

Crystal lattice determination of ZnSe nanowires with polarization-dependent second harmonic generation microscopy.

We demonstrate a noninvasive optical microscopy technique based on polarization-dependent second harmonic generation for determining the crystal lattice structure and microscopic heterogeneities within individual nanostructures. Differentiation between periodically twinned and wurtzite ZnSe nanowires (NWs) was demonstrated, and measurement of the cubic lattice rotation orientation around the NW axis was determined within 1° accuracy. Zinc blende NWs were differentiated from wurtzite. The technique can be used for quality inspection and optimization of growth conditions for nanostructures.