Deterministic field-free voltage-induced magnetization switching with self-regulated precession for low-power memory.

Spintronic devices are regarded as a promising solution for future computing and memory technologies. They are non-volatile, resilient to radiation, and compatible with the CMOS back-end process. However, the major drawbacks of modern current-driven spintronic devices are the long switching delay and relatively high power consumption. Recent progress in magnetoelectronics, particularly in voltage-controlled magnetism reveals a possible solution. Voltage-controlled magnetic anisotropy (VCMA) allows the manipulation of interface-mediated perpendicular anisotropy energy. However, most VCMA-based switching methods require pre-read operation, precise pulse-width control and have high write error rate. This study proposes a novel deterministic self-regulated precessional ferromagnet switching method, which overcomes these issues. In the discussed method, energy symmetry is broken by a dependence of MTJ resistance on the angle between magnetization vectors of free and pinned layers. Hence, the method does not require an external magnetic field and large electric current. The proposed method is verified through micromagnetic simulations and benchmarked with other methods typically reported in the literature. We report the write error rate is significantly improved compared to other VCMA switching methods. Moreover, the mean energy consumption is as low as 38.22 fJ and the mean switching delay is 3.77 ns.

Lateral double magnetic tunnel junction device with orthogonal polarizer for high-performance magnetoresistive memory.

Magnetic tunnel junction (MTJ)-based memory devices have larger switching delay and energy consumption, compared to cache or dynamic random access memory. In order to broaden the applications of the magnetoresistive random access memory, reducing the switching time and energy consumption of the MTJ is required. Here, a novel lateral double MTJ with an orthogonal polarizer is proposed. The proposed device consists of three ferromagnetic regions: the first pinned region (PR1) with perpendicular magnetic anisotropy (PMA), a free region (FR) with PMA, and the second pinned region (PR2) with in-plane magnetic anisotropy (IMA). PR1 and PR2 are placed on top of the oxide barrier, which separates them from the FR, comprising a lateral double MTJ structure. The current pulse through PR2 helps to perturb the magnetization of the FR. Since the angle between PR2 and FR is 90°, the initial torque increases significantly, decreasing switching delay by 4.02 times and energy-delay product by 7.23 times. It is also shown, that the area of the access transistor can be reduced by approximately 10%, while maintaining the same energy-delay product and reducing gate RC delay.