Direct oriented growth of armchair graphene nanoribbons on germanium.

Graphene can be transformed from a semimetal into a semiconductor if it is confined into nanoribbons narrower than 10 nm with controlled crystallographic orientation and well-defined armchair edges. However, the scalable synthesis of nanoribbons with this precision directly on insulating or semiconducting substrates has not been possible. Here we demonstrate the synthesis of graphene nanoribbons on Ge(001) via chemical vapour deposition. The nanoribbons are self-aligning 3° from the Ge〈110〉 directions, are self-defining with predominantly smooth armchair edges, and have tunable width to <10 nm and aspect ratio to >70. In order to realize highly anisotropic ribbons, it is critical to operate in a regime in which the growth rate in the width direction is especially slow, <5 nm h(-1). This directional and anisotropic growth enables nanoribbon fabrication directly on conventional semiconductor wafer platforms and, therefore, promises to allow the integration of nanoribbons into future hybrid integrated circuits.

Vertical and Lateral Copper Transport through Graphene Layers.

A different mechanism was found for Cu transport through multi-transferred single-layer graphene serving as diffusion barriers on the basis of time-dependent dielectric breakdown tests. Vertical and lateral transport of Cu dominates at different stress electric field regimes. The classic E-model was modified to project quantitatively the effectiveness of the graphene Cu diffusion barrier at low electric field based on high-field accelerated stress data. The results are compared to industry-standard Cu diffusion barrier material TaN. 3.5 Å single-layer graphene shows the mean time-to-fail comparable to 4 nm TaN, while two-time and three-time transferred single-layer graphene stacks give 2× and 3× improvements, respectively, compared to single-layer graphene at a 0.5 MV/cm electric field. The influences of graphene grain boundaries on Cu vertical transport through the graphene layers are explored, revealing that large-grain (10-15 µm) single-layer graphene gives a 2 orders of magnitude longer lifetime than small-grain (2-3 µm) graphene. As a result, it is more effective to further enhance graphene barrier reliability by improving single-layer graphene quality through increasing grain sizes or using single-crystalline graphene than just by increasing thickness through multi-transfer. These results may also be applied for graphene as barriers for other metals.

Templating Highly Crystalline Organic Semiconductors Using Atomic Membranes of Graphene at the Anode/Organic Interface.

Charge and energy transport in organic semiconductors is highly anisotropic and dependent on crystalline ordering. Here, we demonstrate a novel approach for ordering crystalline organic semiconductors, with orientations optimized for optoelectronics applications, by using a single monolayer of graphene as a molecular template. We show, in particular, that large-area graphene can be integrated on metals and oxides to modify their surface energies and used to template copper phthalocyanine (CuPc), a prototypical organic semiconductor. On unmodified substrates, thermally evaporated films of CuPc are small-grained, and the molecules are in the "standing-up" (100) orientation. On graphene modified substrates, CuPc is templated in favorable "lying-down" (112̅) and (012̅) orientations with drastically larger crystal sizes. This results in an 86% increase in the absorption coefficient at 700 nm and should furthermore result in enhanced energy and charge transport. The use of highly conductive and transparent (>95%) graphene membranes as templates is expected to be a foundation for developing future planar and nanostructured organic light-emitting diodes and organic photovoltaics with improved performance.