A Wireless Neural Stimulator IC for Cortical Visual Prosthesis.

We propose a 0.25 × 0.25 × 0.3 mm (~0.02 mm3) optically powered mote for visual cortex stimulation to restore vision. Up to 1024 implanted motes can be individually addressed. The complete StiMote system was confirmed fully functional when optically powered and cortex stimulation was confirmed in-vivo with a live rat brain.

A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry.

Miniaturized and wireless near-infrared (NIR) based neural recorders with optical powering and data telemetry have been introduced as a promising approach for safe long-term monitoring with the smallest physical dimension among state-of-the-art standalone recorders. However, a main challenge for the NIR based neural recording ICs is to maintain robust operation in the presence of light-induced parasitic short circuit current from junction diodes. This is especially true when the signal currents are kept small to reduce power consumption. In this work, we present a light-tolerant and low-power neural recording IC for motor prediction that can fully function in up to 300 µW/mm2 of light exposure. It achieves best-in-class power consumption of 0.57 µW at 38° C with a 4.1 NEF pseudo-resistorless amplifier, an on-chip neural feature extractor, and individual mote level gain control. Applying the 20-channel pre-recorded neural signals of a monkey, the IC predicts finger position and velocity with correlation coefficient up to 0.870 and 0.569, respectively, with individual mote level gain control enabled. In addition, wireless measurement is demonstrated through optical power and data telemetry using a custom PV/LED GaAs chip wire bonded to the proposed IC.

A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.

Intracortical brain-machine interfaces have shown promise for restoring function to people with paralysis, but their translation to portable and implantable devices is hindered by their high power consumption. Recent devices have drastically reduced power consumption compared to standard experimental brain-machine interfaces, but still require wired or wireless connections to computing hardware for feature extraction and inference. Here, we introduce a Neural Recording And Decoding (NeuRAD) application specific integrated circuit (ASIC) in 180 nm CMOS that can extract neural spiking features and predict two-dimensional behaviors in real-time. To reduce amplifier and feature extraction power consumption, the NeuRAD has a hardware accelerator for extracting spiking band power (SBP) from intracortical spiking signals and includes an M0 processor with a fixed-point Matrix Acceleration Unit (MAU) for efficient and flexible decoding. We validated device functionality by recording SBP from a nonhuman primate implanted with a Utah microelectrode array and predicting the one- and two-dimensional finger movements the monkey was attempting to execute in closed-loop using a steady-state Kalman filter (SSKF). Using the NeuRAD's real-time predictions, the monkey achieved 100% success rate and 0.82 s mean target acquisition time to control one-dimensional finger movements using just 581 µW. To predict two-dimensional finger movements, the NeuRAD consumed 588 µW to enable the monkey to achieve a 96% success rate and 2.4 s mean acquisition time. By employing SBP, ASIC brain-machine interfaces can close the gap to enable fully implantable therapies for people with paralysis.

A Light Tolerant Neural Recording IC for Near-Infrared-Powered Free Floating Motes.

A key challenge for near-infrared (NIR) powered neural recording ICs is to maintain robust operation in the presence of parasitic short circuit current from junction diodes when exposed to light. This is especially so when intentional currents are kept small to reduce power consumption. We present a neural recording IC that is tolerant up to 300 µW/mm2 light exposure (above tissue limit) and consumes 0.57 µW at 38°C, making it lowest power among standalone motes while incorporating on-chip feature extraction and individual gain control.

A Constant Energy-Per-Cycle Ring Oscillator Over a Wide Frequency Range for Wireless Sensor Nodes.

This paper presents an energy-efficient oscillator for wireless sensor nodes (WSNs). It avoids short-circuit current by minimizing the time spent in the input voltage range from Vthn to [Vdd - |Vthp|]. A current-feeding scheme with gate voltage control enables the oscillator to operate over a wide frequency range. A test chip is fabricated in a 0.18 µm CMOS process. The measurements show that the proposed oscillator achieves a constant energy-per-cycle (EpC) of 0.8 pJ/cycle over the 21-60 MHz frequency range and is more efficient than a conventional current-starved ring oscillator (CSRO) below 300 kHz at 1.8 V supply voltage. As an application example, the proposed oscillator is implemented in a switched-capacitor DC-DC converter. The converter is 11%-56% more efficient for load power values ranging from 583 pW to 2.9 nW than a converter using a conventional CSRO.

A 66pW Discontinuous Switch-Capacitor Energy Harvester for Self-Sustaining Sensor Applications.

We present a discontinuous harvesting approach for switch capacitor DC-DC converters that enables ultra-low power energy harvesting. By slowly accumulating charge on an input capacitor and then transferring it to a battery in burst-mode, switching and leakage losses in the DC-DC converter can be optimally traded-off with the loss due to non-ideal MPPT operation. The harvester uses a 15pW mode controller, an automatic conversion ratio modulator, and a moving sum charge pump for low startup energy upon a mode switch. In 180nm CMOS, the harvester achieves >40% end-to-end efficiency from 113pW to 1.5µW with 66pW minimum input power, marking a >10× improvement over prior ultra-low power harvesters.

A 380pW Dual Mode Optical Wake-up Receiver with Ambient Noise Cancellation.

We present a sub-nW optical wake-up receiver for wireless sensor nodes. The wake-up receiver supports dual mode operation for both ultra-low standby power and high data rates, while canceling ambient in-band noise. In 0.18µm CMOS the receiver consumes 380pW in always-on wake-up mode and 28.1µW in fast RX mode at 250kbps.

A 10.6mm3 Fully-Integrated, Wireless Sensor Node with 8GHz UWB Transmitter.

This paper presents a complete, autonomous, wireless temperature sensor, fully encapsulated in a 10.6mm3 volume. The sensor includes solar energy harvesting with an integrated 2 µAh battery, optical receiver for programming, microcontroller and memory, 8GHz UWB transmitter, and miniaturized custom antennas with a wireless range of 7 meters. Full, stand-alone operation was demonstrated for the first time for a system of this size and functionality.

A 99nW 70.4kHz Resistive Frequency Locking On-Chip Oscillator with 27.4ppm/°C Temperature Stability.

We present a low power on-chip oscillator for system-on-chip designs. The oscillator introduces a resistive frequency locking loop topology where the equivalent resistance of a switched-capacitor is matched to a temperature-compensated resistor. The approach eliminates the traditional comparator from the oscillation loop, which consumes significant power and limits temperature stability in conventional relaxation oscillators. The oscillator is fabricated in 0.18µm CMOS and exhibits 27.4ppm/°C and <7ppm long-term stability while consuming 99.4nW at 70.4 kHz.

A 120nW 8b Sub-ranging SAR ADC with Signal-Dependent Charge Recycling for Biomedical Applications.

We present an 8-bit sub-ranging SAR ADC designed for bursty signals having long time periods with small code spread. A modified capacitive-DAC (CDAC) saves previous sample's MSB voltage and reuses it throughout subsequent conversions. This prevents unnecessary switching of large MSB capacitors as well as conversion cycles, reducing energy consumed in the comparator and digital logic and yielding total energy savings of 2.6×. In 0.18µm CMOS, the ADC consumes 120nW at 0.6V and 100kS/s with 46.9dB SNDR.

A 5.8nW, 45ppm/°C On-Chip CMOS Wake-up Timer Using a Constant Charge Subtraction Scheme.

This work presents an ultra-low power oscillator designed for wake-up timers in compact wireless sensors. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18µm CMOS, the oscillator consumes 5.8nW at room temperature with temperature stability of 45ppm/°C (-10°C to 90°C) and 1%V line sensitivity.