Low-Temperature-Processed High-Performance Pentacene OTFTs with Optimal Nd-Ti Oxynitride Mixture as Gate Dielectric.

When processed at a low temperature of 200 °C, organic thin-film transistors (OTFTs) with pentacene channel adopting high-k Neodymium-Titanium oxynitride mixtures (NdTiON) with various Ti contents as gate dielectrics are fabricated. The Ti content in the NdTiON is varied by co-sputtering a Ti target at 0 W, 10 W, 20 W and 30 W, respectively, while fixing the sputtering power of an Nd target at 45 W. High-performance OTFT is obtained for the 20 W-sputtered Ti, including a small threshold voltage of -0.71 V and high carrier mobility of 1.70 cm2/V·s. The mobility improvement for the optimal Ti content can be attributed to smoother dielectric surface and resultant larger overlying pentacene grains as reflected by Atomic Force Microscopy measurements. Moreover, this sample with the optimal Ti content shows much higher mobility than its counterpart processed at a higher temperature of 400 °C (0.8 cm2/V·s) because it has a thinner gate-dielectric/gate-electrode interlayer for stronger screening on the remote phonon scattering by the gate electrode. In addition, a high dielectric constant of around 10 is obtained for the NdTiON gate dielectric that contributes to a threshold voltage smaller than 1 V for the pentacene OTFT, implying the high potential of the Nd-Ti oxynitride in future high-performance organic devices.

Few-Layered MoS2 Field-Effect Transistors with a Vertical Channel of Sub-10 nm.

Few-layered molybdenum disulfide (MoS2) has demonstrated promising advantages for the integration of next-generation electronic devices. A vertical short-channel MoS2 transistor with a channel length of sub-10 nm can be realized using mica as the insulated mesa and MoS2 flake dry-transferred onto the mica as the channel. A near-perfect symmetrical and fully saturated output characteristic can be obtained for the positive or negative drain-source voltage. This result is attributed to an effective transformation of the drain-source electrode contact from Schottky contact to Ohmic contact via forming gas annealing. The vertical-channel MoS2 transistor with a channel length of 8.7 nm exhibits excellent electrical characteristics, for example, a negligible hysteresis voltage of 60 mV, an extraordinarily small subthreshold swing of 73 mV/dec, a considerably weakened drain-induced barrier-lowering effect (100 mV/V), and the first-reported intrinsic delay time of 2.85 ps. Moreover, a logic inverter can be realized using the two vertical-channel MoS2 transistors, with a high voltage gain of 33. Experimental results indicate that the developed method is a potential approach for fabricating MoS2 transistors with an ultrashort channel and high performance, and consequently, manufacturing MoS2-based integrated circuits.

Long-term stability of multilayer MoS2 transistors with mica gate dielectric.

To avoid surface damage of a MoS2 channel, a mica flake with high permittivity and atomically flat surface was dry transferred onto a multilayer MoS2 flake to prepare top-gated transistors. For the first time, the interface properties of mica/MoS2 and the long-term stability of devices were investigated when the transistors were exposed to ambient air. Results show that the electrical performance of the transistors is degraded significantly when the devices are exposed to ambient moisture for a long time, due to the strong hydrophilism of mica. The transfer curves of the transistors cannot be recovered to their initial states even after annealing. The adsorbed moisture can become trapped at the interface between the MoS2 channel and mica dielectric or on the MoS2 surface, resulting in enhanced carrier scattering and degraded device performance. However, the top-gated MoS2 transistor with Al2O3 encapsulation exhibits enhanced stability even after annealing or exposure to atmosphere for 200 days. The excellent stability should be attributed to the effective insulation of moisture from the ambient air by Al2O3 encapsulation. Therefore, a dense and hydrophobic encapsulation layer is indispensable for stable and high-performance top-gated MoS2 transistors with mica gate dielectric.

Optimizing Al-doped ZrO2 as the gate dielectric for MoS2 field-effect transistors.

In this work, we investigate the effects on the electrical properties of few-layered MoS2 field-effect transistors (FETs) following Al incorporation into ZrO2 as the gate dielectrics of the devices. A large improvement in device performance is achieved with the Al-doped ZrO2 gate dielectric when Zr:Al = 1:1. The relevant MoS2 transistor exhibits the best electrical characteristics: high carrier mobility of 40.6 cm2 V-1 s-1 (41% higher than that of the control sample, and an intrinsic mobility of 68.0 cm2 V-1 s-1), a small subthreshold swing of 143 mV dec-1, high on/off current ratio of 6 × 106 and small threshold voltage of 0.71 V. These are attributed to the facts that (i) Al incorporation into ZrO2 can decrease its oxygen vacancies; densify the dielectric film; and smooth the gate dielectric surface, thus reducing the traps at/near the Zr0.5Al0.5O y /MoS2 interface and the gate leakage current; (ii) adjusting the dielectric constant of the gate dielectric to an appropriate value, which achieves a reasonable trade-off between the gate screening effect on the Coulomb-impurity scattering and the surface optical phonon scattering. These results demonstrate that optimized Zr0.5Al0.5Oy is a potential gate dielectric material for MoS2 FET applications.

Damage-free mica/MoS2 interface for high-performance multilayer MoS2 field-effect transistors.

For top-gated MoS2 field-effect transistors, damaging the MoS2 surface to the MoS2 channel are inevitable due to chemical bonding and/or high-energy metal atoms during the vacuum deposition of gate dielectric, thus leading to degradations of field-effect mobility (µ FE) and subthreshold swing (SS). A top-gated MoS2 transistor is fabricated by directly transferring a 9 nm mica flake (as gate dielectric) onto the MoS2 surface without any chemical bonding, and exhibits excellent electrical properties with an on-off ratio of ∼108, a low threshold voltage of ∼0.2 V, a record µ FE of 134 cm2 V-1 s-1, a small SS of 72 mV dec-1 and a low interface-state density of 8.8 × 1011 cm-2 eV-1, without relying on electrode-contact engineered and/or phase-engineered MoS2. Although the equivalent oxide thickness of the mica dielectric is in the sub-5 nm regime, enhanced stability characterized by normalized threshold voltage shift (1.2 × 10-2 V MV-1 cm-1) has also been demonstrated for the transistor after a gate-bias stressing at 4.4 MV cm-1 for 103 s. All these improvements should be ascribed to a damage-free MoS2 channel achieved by a dry transfer of gate dielectric and a clean and smooth surface of the mica flake, which greatly decreases the charged-impurity and interface-roughness scatterings. The proposed transistor with low threshold voltage and high stability is highly desirable for low-power electronic applications.

Effects of HfO2 encapsulation on electrical performances of few-layered MoS2 transistor with ALD HfO2 as back-gate dielectric.

The carrier mobility of MoS2 transistors can be greatly improved by the screening role of high-k gate dielectric. In this work, atomic-layer deposited (ALD) HfO2 annealed in NH3 is used to replace SiO2 as the gate dielectric to fabricate back-gated few-layered MoS2 transistors, and good electrical properties are achieved with field-effect mobility (µ) of 19.1 cm2 V-1 s-1, subthreshold swing (SS) of 123.6 mV dec-1 and on/off ratio of 3.76 × 105. Furthermore, enhanced device performance is obtained when the surface of the MoS2 channel is coated by an ALD HfO2 layer with different thicknesses (10, 15 and 20 nm), where the transistor with a 15 nm HfO2 encapsulation layer exhibits the best overall electrical properties: µ = 42.1 cm2 V-1 s-1, SS = 87.9 mV dec-1 and on/off ratio of 2.72 × 106. These improvements should be associated with the enhanced screening effect on charged-impurity scattering and protection from absorption of environmental gas molecules by the high-k encapsulation. The capacitance equivalent thickness of the back-gate dielectric (HfO2) is only 6.58 nm, which is conducive to scaling of the MoS2 transistors.

Suppressing the Coffee-Ring Effect in Semitransparent MnO2 Film for a High-Performance Solar-Powered Energy Storage Window.

We introduce a simple and effective method to deposit a highly uniform and semitransparent MnO2 film without coffee-ring effect (CRE) by adding ethanol into MnO2 ink for transparent capacitive energy storage devices. By carefully controlling the amount of ethanol added in the MnO2 droplet, we could significantly reduce the CRE and thus improve the film uniformity. The electrochemical properties of supercapacitor (SC) devices using semitransparent MnO2 film electrodes with or without CRE were measured and compared. The SC device without CRE shows a superior capacitance, high rate capability, and lower contact resistance. The CRE-free device could achieve a considerable volumetric capacitance of 112.2 F cm(-3), resulting in a high volumetric energy density and power density of 10 mWh cm(-3) and 8.6 W cm(-3), respectively. For practical consideration, both flexible SC and large-area rigid SC devices were fabricated to demonstrate their potential for flexible transparent electronic application and capacitive energy-storage window application. Moreover, a solar-powered energy storage window which consists of a commercial solar cell and our studied semitransparent MnO2-film-based SCs was assembled. These SCs could be charged by the solar cell and light up a light emitting diode (LED), demonstrating their potential for self-powered systems and energy-efficient buildings.

Aqueous manganese dioxide ink for paper-based capacitive energy storage devices.

We report a simple approach based on a chemical reduction method to synthesize aqueous inorganic ink comprised of hexagonal MnO2 nanosheets. The MnO2 ink exhibits long-term stability and continuous thin films can be formed on various substrates without using any binder. To obtain a flexible electrode for capacitive energy storage, the MnO2 ink was printed onto commercially available A4 paper pretreated with multiwalled carbon nanotubes. The electrode exhibited a maximum specific capacitance of 1035 F g(-1) (91.7 mF cm(-2)). Paper-based symmetric and asymmetric capacitors were assembled, which gave a maximum specific energy density of 25.3 Wh kg(-1) and a power density of 81 kW kg(-1). The device could maintain a 98.9% capacitance retention over 10 000 cycles at 4 A g(-1). The MnO2 ink could be a versatile candidate for large-scale production of flexible and printable electronic devices for energy storage and conversion.

Universal energy-level alignment of molecules on metal oxides.

Transition-metal oxides improve power conversion efficiencies in organic photovoltaics and are used as low-resistance contacts in organic light-emitting diodes and organic thin-film transistors. What makes metal oxides useful in these technologies is the fact that their chemical and electronic properties can be tuned to enable charge exchange with a wide variety of organic molecules. Although it is known that charge exchange relies on the alignment of donor and acceptor energy levels, the mechanism for level alignment remains under debate. Here, we conclusively establish the principle of energy alignment between oxides and molecules. We observe a universal energy-alignment trend for a set of transition-metal oxides--representing a broad diversity in electronic properties--with several organic semiconductors. The trend demonstrates that, despite the variance in their electronic properties, oxide energy alignment is governed by one driving force: electron-chemical-potential equilibration. Using a combination of simple thermodynamics, electrostatics and Fermi statistics we derive a mathematical relation that describes the alignment.