Modification and Characterization of Interfacial Bonding for Thermal Management of Ruthenium Interconnects in Next-Generation Very-Large-Scale Integration Circuits.

Ruthenium may replace copper interconnects in next-generation very-large-scale integration (VLSI) circuits. However, interfacial bonding between Ru interconnect wires and surrounding dielectrics must be optimized to reduce thermal boundary resistance (TBR) for thermal management. In this study, various adhesion layers are employed to modify bonding at the Ru/SiO2 interface. The TBRs of film stacks are measured using the frequency-domain thermoreflectance technique. TiN and TaN with high nitrogen contents significantly reduce the TBR of the Ru/SiO2 interface compared to common Ti and Ta adhesion layers. The adhesion layer thickness, on the other hand, has only minor effect on TBR when the thickness is within 2-10 nm. Hard X-ray photoelectron spectroscopy of deeply buried layers and interfaces quantitatively reveals that the decrease in TBR is attributed to the enhanced bonding of interfaces adjacent to the TaN adhesion layer, probably due to the electron transfer between the atoms at two sides of the interface. Simulations by a three-dimensional electrothermal finite element method demonstrate that decreasing the TBR leads to a significantly smaller temperature increase in the Ru interconnects. Our findings highlight the importance of TBR in the thermal management of VLSI circuits and pave the way for Ru interconnects to replace the current Cu-based ones.

Control of anisotropic conduction of carbon nanotube sheets and their use as planar-type thermoelectric conversion materials.

The large anisotropic thermal conduction of a carbon nanotube (CNT) sheet that originates from the in-plane orientation of one-dimensional CNTs is disadvantageous for thermoelectric conversion using the Seebeck effect since the temperature gradient is difficult to maintain in the current flow direction. To control the orientation of the CNTs, polymer particles are introduced as orientation aligners upon sheet formation by vacuum filtration. The thermal conductivities in the in-plane direction decrease as the number of polymer particles in the sheet increases, while that in the through-plane direction increases. Consequently, a greater temperature gradient is observed for the anisotropy-controlled CNT sheet as compared to that detected for the CNT sheet without anisotropy control when a part of the sheet is heated, which results in a higher power density for the planar-type thermoelectric device. These findings are quite useful for the development of flexible and wearable thermoelectric batteries using CNT sheets.

Effect of the Thermal Boundary Resistance in Metal/Dielectric Thermally Conductive Layers on Power Generation of Silicon Nanowire Microthermoelectric Generators.

In microthermoelectric generators (µTEGs), parasitic thermal resistance must be suppressed to increase the temperature difference across thermocouples for optimum power generation. A thermally conductive (TC) layer is typically used in µTEGs to guide the heat flow from the heat source to the hot junction of each thermocouple. In this study, we investigate the effect of the thermal boundary resistance (TBR) in metal/dielectric TC layers on the power generation of silicon nanowire (SiNW) µTEGs. We prepared various metal/adhesion/dielectric TC layers using different metal, adhesion, and dielectric layers and measured the thermal resistance using the frequency-domain thermoreflectance method. We found that the thermal resistance was significantly different, mainly due to the TBR of the metal/dielectric interfaces. Interface characterization highlights the significant role of the interfacial bonding strength and interdiffusion in TBR. We fabricated a prototype SiNW-µTEG with different TC layers for testing, finding that the power generation increased significantly when the thermal resistance of the TC layer was lowered. This study helps to understand the underlying physics of thermal transport at interfaces and provides a guideline for the design and fabrication of µTEGs to enhance power generation for effective energy harvesting.

Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI.

Temperature increase in the continuously narrowing interconnects accelerates the performance and reliability degradation of very large scale integration (VLSI). Thermal boundary resistance (TBR) between an interconnect metal and dielectric interlayer has been neglected or treated approximately in conventional thermal analyses, resulting in significant uncertainties in performance and reliability. In this study, we investigated the effects of TBR between an interconnect metal and dielectric interlayer on temperature increase of Cu, Co, and Ru interconnects in deeply scaled VLSI. Results indicate that the measured TBR is significantly higher than the values predicted by the diffuse mismatch model and varies widely from 1 × 10-8 to 1 × 10-7 m2 K W-1 depending on the liner/barrier layer used. Finite element method simulations show that such a high TBR can cause a temperature increase of hundreds of degrees in the future VLSI interconnect. Characterization of interface properties shows the significant importance of interdiffusion and adhesion in TBR. For future advanced interconnects, Ru is better than Co for heat dissipation in terms of TBR. This study provides a guideline for the thermal management in deeply scaled VLSI.

Miniaturized planar Si-nanowire micro-thermoelectric generator using exuded thermal field for power generation.

For harvesting energy from waste heat, the power generation densities and fabrication costs of thermoelectric generators (TEGs) are considered more important than their conversion efficiency because waste heat energy is essentially obtained free of charge. In this study, we propose a miniaturized planar Si-nanowire micro-thermoelectric generator (SiNW-µTEG) architecture, which could be simply fabricated using the complementary metal-oxide-semiconductor-compatible process. Compared with the conventional nanowire µTEGs, this SiNW-µTEG features the use of an exuded thermal field for power generation. Thus, there is no need to etch away the substrate to form suspended SiNWs, which leads to a low fabrication cost and well-protected SiNWs. We experimentally demonstrate that the power generation density of the SiNW-µTEGs was enhanced by four orders of magnitude when the SiNWs were shortened from 280 to 8 µm. Furthermore, we reduced the parasitic thermal resistance, which becomes significant in the shortened SiNW-µTEGs, by optimizing the fabrication process of AlN films as a thermally conductive layer. As a result, the power generation density of the SiNW-µTEGs was enhanced by an order of magnitude for reactive sputtering as compared to non-reactive sputtering process. A power density of 27.9 nW/cm2 has been achieved. By measuring the thermal conductivities of the two AlN films, we found that the reduction in the parasitic thermal resistance was caused by an increase in the thermal conductivity of the AlN film and a decrease in the thermal boundary resistance.

Probing spatial heterogeneity in silicon thin films by Raman spectroscopy.

Raman spectroscopy is a powerful technique for revealing spatial heterogeneity in solid-state structures but heretofore has not been able to measure spectra from multiple positions on a sample within a short time. Here, we report a novel Raman spectroscopy approach to study the spatial heterogeneity in thermally annealed amorphous silicon (a-Si) thin films. Raman spectroscopy employs both a galvano-mirror and a two-dimensional charge-coupled device detector system, which can measure spectra at 200 nm intervals at every position along a sample in a short time. We analyzed thermally annealed a-Si thin films with different film thicknesses. The experimental results suggest a correlation between the distribution of the average nanocrystal size over different spatial regions and the thickness of the thermally annealed a-Si thin film. The ability to evaluate the average size of the Si nanocrystals through rapid data acquisition is expected to lead to research into new applications of nanocrystals.