Alignment tolerant, low voltage, 0.23†V.cm, push-pull silicon photonic switches based on a vertical pn junction.

In this paper, we present the design, fabrication and characterization of a carrier depletion silicon-photonic switch based on a highly doped vertical pn junction. The vertical nature of the pn junction enables the device to exhibit a modulation efficiency as high as 0.23 V.cm. Fast switching times of 60ps are achieved in a lumped configuration. Moreover, the process flow is highly tolerant to fabrication deviations allowing a seamless transfer to the 350 nm process node of a commercial complementary-metal-oxide semiconductor (CMOS) foundry. Overall, this work showcases the possibility of fabricating highly efficient carrier depletion-based silicon photonic switches using medium resolution lithography.

10 Gb/s optical random access memory (RAM) cell.

Optical random access memories (RAMs) have been conceived as high-bandwidth alternatives of their electronic counterparts, raising expectations for ultra-fast operation that can resolve the ns-long electronic RAM access bottleneck. However, experimentally demonstrated optical RAMs have been limited to up to 5 GHz only, failing to validate the speed advantages over electronics. In this Letter, we demonstrate the first all-optical RAM cell that performs both Write and Read functionalities at 10 Gb/s, reporting on a 100% speed increase compared to state-of-the-art optical RAM demonstrations. To achieve this, the proposed RAM cell deploys a monolithically integrated InP optical Flip-Flop and a Semiconductor optical amplifier-Mach-Zehnder Interferometer (SOA-MZI) On/Off switch configured to operate as a strongly saturated differentially-biased access gate. Error-free operation is demonstrated at 10 Gb/s for both Write and Read operations with 6.2 dB and 0.4 dB power, respectively, achieving the fastest reported RAM cell functionalities.

All-optical 10Gb/s ternary-CAM cell for routing look-up table applications.

We experimentally demonstrate the first all-optical Ternary-Content Addressable Memory (T-CAM) cell that operates at 10Gb/s and comprises two monolithically integrated InP Flip-Flops (FF) and a SOA-MZI optical XOR gate. The two FFs are responsible for storing the data bit and the ternary state 'X', respectively, with the XOR gate used for comparing the stored FF-data and the search bit. The experimental results reveal error-free operation at 10Gb/s for both Write and Ternary Content Addressing of the T-CAM cell, indicating that the proposed optical T-CAM cell could in principle lead to all-optical T-CAM-based Address Look-up memory architectures for high-end routing applications.