RESUMO
The decentralized manycore architecture is broadly adopted by neuromorphic chips for its high computing parallelism and memory locality. However, the fragmented memories and decentralized execution make it hard to deploy neural network models onto neuromorphic hardware with high resource utilization and processing efficiency. There are usually two stages during the model deployment: one is the logical mapping that partitions parameters and computations into small slices and allocate each slice into a single core with limited resources; the other is the physical mapping that places each logical core to a physical location in the chip. In this work, we propose the mapping limit concept for the first time that points out the resource saving upper limit in logical and physical mapping. Furthermore, we propose a closed-loop mapping strategy with an asynchronous 4D model partition for logical mapping and a Hamilton loop algorithm (HLA) for physical mapping. We implement the mapping methods on our state-of-the-art neuromorphic chip, TianjicX. Extensive experiments demonstrate the superior performance of our mapping methods, which can not only outperform existing methods but also approach the mapping limit. We believe the mapping limit concept and the closed-loop mapping strategy can help build a general and efficient mapping framework for neuromorphic hardware.
RESUMO
Transparent chalcogenide glass ceramics were prepared by thermally treating gold-doped germanium-gallium-sulfur glass. The gold, as nucleating agents, modified the crystallization process of the glass, resulting in the formation of nanocrystals belonging to a single α-Ga2S3 phase. The crystalline grains increased in number with the treatment duration while their size remained constant, leading to a high infrared transmittance of the glass ceramics. Z-scan measurements revealed the performance improvement of the α-Ga2S3 nanocrystals to third-order optical nonlinearities.
