Failure type and failure level detection of insulators according to monitored leakage current.

Due to the ever-increasing growth of electric energy consumption, the production of high-quality, reliable and high-reliability electricity is very important. Therefore, it is essential to have distribution and sub-transmission networks with a good reliability factor. In power distribution and sub-transmission lines, it is necessary to somehow isolate the conductors under voltage from the towers, and insulators are used for this purpose. These insulators have two main tasks. One of the main tasks of insulators is to isolate (insulate) the line conductor from the body of the tower. The insulators must be able to isolate the high voltages of the lines from the body of the tower without having a leakage current, and on the other hand, the insulators must be able to withstand the mechanical forces resulting from the weight of the conductors and the applied forces caused by wind and ice. Also, leakage current is one of the important parameters for condition monitoring of insulators in power grid lines. Failure to inspect the insulation for contamination and health conditions will lead to insulator failure and will cause faults in the electrical system. Therefore, it is very important to monitor the condition of the insulator. Based on this, in this paper, according to the data related to leakage current and also according to the introduced wear out function, a procedure for measuring the condition of insulators has been obtained. Finally, the condition of each insulator will be determined according to the defined indicators. Also, the failure level of each monitored data will be obtained using sensitivity analysis.

Robust PWM control scheme for switched-capacitor MLI with leakage current suppression in grid-connected renewable energy application.

Typically, parasitic capacitances exist between the ground and the solar panel terminals in grid-connected PV systems. These parasitic capacitances provide a path for a leakage current, which leads to significant safety concerns, observable and seriously hazardous harmonic orders aligned with the injected grid current, and significant safety difficulties. In this research, a robust PWM controlling method that used competently in reducing the level of the leakage current and improving the power quality of a switched-capacitor Multilevel Inverter. This technique creates developed reference signals from the main signal to generate the switching scheme for the converter circuit. Additionally, the suggested control strategy only works with a small number of carrier signals, resulting in a quick system response and a simpler controller algorithm. Likewise, this controlling approach offers a stable way to maintain a constant output voltage in the suggested converter by adjusting the switching capacitors' voltages, which is not possible with traditional control techniques. MATLAB/Simulink is used to simulate the outcomes for both the suggested control approach and the traditional Phase Disposition (PD) PWM control method whereas the leakage current component reduces to 25 % compared to the captured component with the PDPWM. The simulation and the practical results based on the dSPACE-1103 hardware are quite similar.

Research on the Asymmetric Phenomenon of Voltage Polarity Based on Dielectric Wetting.

The present research investigated the voltage polarity asymmetry phenomenon based on dielectric wetting. In an ITO-hydrophobic layer-droplet setup, three reagents with different pH values (3.96, 7.0, and 10.18), two types of hydrophobic materials (AF1601 and 6%T6), and two different thicknesses (340 nm and 2.5 µm) of each material were systematically investigated. The results show that the thickness of the hydrophobic dielectric layer and the pH of the droplets had a significant impact on the droplet contact angle variation with the voltage. The contact angle on the thick hydrophobic dielectric layer followed the Lippmann-Young equation as the voltage changed. The angle of the thin hydrophobic dielectric layer was affected by its own properties and the type of droplet, which led to the occurrence of voltage polarity asymmetry of the electrowetting phenomenon. After further investigation of this phenomenon, it was found that it mainly accounted for the decrease in electric field strength at both ends of the droplet, which was caused by electrochemical reactions and changes in circuit resistance. The leakage current is an important indicator, and this phenomenon can be prevented by increasing the thickness of the hydrophobic dielectric layer.

Improvement Performance of p-GaN Gate High-Electron-Mobility Transistors with GaN/AlN/AlGaN Barrier Structure.

This study demonstrates a particular composited barrier structure of high-electron-mobility transistors (HEMTs) with an enhancement mode composed of p-GaN/GaN/AlN/AlGaN/GaN. The purpose of the composite barrier structure device is to increase the maximum drain current, reduce gate leakage, and achieve lower on-resistance (Ron) performance. A comparison was made between the conventional device without the composited barrier and the device with the composited barrier structure. The maximum drain current is significantly increased by 37%, and Ron is significantly reduced by 23%, highlighting the synergistic impact of the composite barrier structure on device performance improvement. This reason can be attributed to the undoped GaN (u-GaN) barrier layer beneath p-GaN, which was introduced to mitigate Mg diffusion in the capping layer, thus addressing its negative effects. Furthermore, the AlN barrier layer exhibits enhanced electrical properties, which can be attributed to the critical role of high-energy-gap properties that increase the 2DEG carrier density and block leakage pathways. These traps impact the device behavior mechanism, and the simulation for a more in-depth analysis of how the composited barrier structure brings improvement is introduced using Synopsys Sentaurus TCAD.

Design and 3D Electrical Simulations for a Controllable Equal-Gap Large-Area Silicon Drift Detector.

In this study, a controllable equal-gap large-area silicon drift detector (L-SDD) is designed. The surface leakage current is reduced by reducing the SiO2-Si interface through the new controllable equal-gap design. The design of the equal gap also solves the problem whereby the gap widens due to the larger detector size in the previous SDD design, which leads to a large invalid area of the detector. In this paper, a spiral hexagonal equal-gap L-SDD of 1 cm radius is selected for design calculation, and we implement 3D modeling and simulation of the device. The simulation results show that the internal potential gradient distribution of the L-SDD is uniform and forms a drift electric field, with the direction of electron drift pointing towards the collecting anode. The L-SDD has an excellent electron drift channel inside, and this article also analyzes the electrical performance of the drift channel to verify the correctness of the design method of the L-SDD.

Inkjet-Printed Dielectric Layer for the Enhancement of Electrowetting Display Devices.

Electrowetting with a dielectric layer is commonly preferred in practical applications. However, its potential is often limited by factors like the properties of the dielectric layer and its breakdown, along with the complexity of the deposition method. Fortunately, advancements in 3D inkjet printing offer a more adaptable solution for making patterned functional layers. In this study, we used a negative photoresist (HN-1901) to create a new dielectric layer for an electrowetting display on a 3-inch ITO glass using a Dimatix DMP-2580 inkjet printer. The resulting devices performed better due to their enhanced resistance to dielectric breakdown. We meticulously investigated the physical properties of the photoresist material and printer settings to achieve optimal printing. We also controlled the uniformity of the dielectric layer by adjusting ink drop spacing. Compared to traditional electrowetting display devices, those with inkjet-printed dielectric layers showed significantly fewer defects like bubbles and electrode corrosion. They maintained an outstanding response time and breakdown resistance, operating at an open voltage of 20 V. Remarkably, these devices achieved faster response times of ton 22.3 ms and toff 14.2 ms, surpassing the performance of the standard device.

Universal Way to Enhance Solution-Processed High-κ Oxide Dielectrics Performance by Sulfate Incorporation.

Vacuum-free, solution-processable high-κ-oxide dielectrics are considered to be a key element for emerging low-cost flexible electronics. However, they usually suffer from low breakdown strength and frequency-dependent capacitance, which limit their broader applications. Here, we report a universal way to improve solution-based high-κ oxide dielectric properties (e.g., Al2O3, ZrO2, Ga2O3, Sc2O3, Ho2O3, and Sm2O3) by sulfate incorporation. In-depth characterization shows that sulfate incorporation could reduce hydrogen and oxygen vacancy-related defects in high-κ oxides, thereby improving the dielectric performance. The optimized S-doped high-κ oxides show smooth surface (rms < 0.20 nm), low leakage current (∼10-7 A/cm2@4 MV/cm), excellent dielectric breakdown strength (>10 MV/cm), and stable capacitance-frequency characteristics. Besides, oxide thin-film transistors based on these high-κ dielectrics exhibit excellent performance (e.g., mobility >20 cm2 V-1 s-1, on/off ratio of ∼107, threshold swing of ∼0.14 V dec-1, threshold voltage of ∼0 V, and hysteresis of ∼0.02 V). Thus, this work provides a general approach for the development of high-quality solution-based high-κ oxides for transistor circuitry.

High Energy Density Achieved in Novel Lead-Free BiFeO3-CaTiO3 Ferroelectric Ceramics for High-Temperature Energy Storage Applications.

The development of high-performance electrostatic energy storage dielectrics is essential for various applications such as pulsed-power technologies, electric vehicles (EVs), electronic devices, and the high-temperature aviation sector. However, the usage of lead as a crucial component in conventional high-performance dielectric materials has raised severe environmental concerns. As a result of this, there is an urgent need to explore lead-free alternatives. Ferroelectric ceramics offer high energy density but lack stability at high temperatures. Here we present a lead-free (1 - x)BiFeO3-xCaTiO3 (x = 0.6, 0.7, and 0.8; BFO-CTO) ceramic capacitor with low dielectric loss, high thermal stability, and high energy density up to ∼200 °C. The introduction of CTO (x = 0.7) to the BFO matrix triggers a transition from the normal ferroelectrics to the relaxor ferroelectrics state, resulting in a high recoverable energy density of 1.18 J cm-3 at 190 °C with an ultrafast dielectric relaxation time of 44 µs. These results offer a promising, environmentally friendly, high-capacity ceramic capacitor material for high-frequency and high-temperature applications.

Band-to-Band Tunneling Leakage Current Characterization and Projection in Carbon Nanotube Transistors.

Carbon nanotube (CNT) transistors demonstrate high mobility but also experience off-state leakage due to the small effective mass and band gap. The lower limit of off-current (IMIN) was measured in electrostatically doped CNT metal-oxide-semiconductor field-effect transistors (MOSFETs) across a range of band gaps (0.37 to 1.19 eV), supply voltages (0.5 to 0.7 V), and extension doping levels (0.2 to 0.8 carriers/nm). A nonequilibrium Green's function (NEGF) model confirms the dependence of IMIN on CNT band gap, supply voltage, and extension doping level. A leakage current design space across CNT band gap, supply voltage, and extension doping is projected based on the validated NEGF model for long-channel CNT MOSFETs to identify the appropriate device design choices. The optimal extension doping and CNT band gap design choice for a target off-current density are identified by including on-current projection in the leakage current design space. An extension doping level >0.5 carrier/nm is required for optimized on-current.

Boronization: A General Strategy for Rare Earth Oxides with Enhanced High-κ Gate Dielectric Performance.

Rare earth oxides (REOs) can be used as high-κ gate dielectrics that are at the core of electronic devices. However, a bottleneck remains with regard to obtaining high-performance REO dielectrics due to the serious hygroscopic issue and high defect states. Here, a general boronization strategy is reported to enhance the high-κ REO gate dielectric performance. Complementary characterization reveals that boronization is capable of reducing oxygen vacancies/hydroxyl defects in REOs and suppressing moisture absorption, leading to the improvement of leakage current, breakdown strength (up to 9 MV/cm), and capacitance-frequency stability. Furthermore, oxide transistors based on boronized REO dielectrics demonstrate state-of-the-art device characteristics with a high mobility of 40 cm2/V s, a current on/off ratio of 108, a subthreshold swing of 82 mV/dec, a hysteresis of 0.05 V, and superior bias stress stability.

Critical Contribution of Imbalanced Charge Loss to Performance Deterioration of Si-Based Lithium-Ion Cells during Calendar Aging.

Increasing the energy density of lithium-ion batteries, and thereby reducing costs, is a major target for industry and academic research. One of the best opportunities is to replace the traditional graphite anode with a high-capacity anode material, such as silicon. However, Si-based lithium-ion batteries have been widely reported to suffer from a limited calendar life for automobile applications. Heretofore, there lacks a fundamental understanding of calendar aging for rationally developing mitigation strategies. Both open-circuit voltage and voltage-hold aging protocols were utilized to characterize the aging behavior of Si-based cells. Particularly, a high-precision leakage current measurement was applied to quantitatively measure the rate of parasitic reactions at the electrode/electrolyte interface. The rate of parasitic reactions at the Si anode was found 5 times and 15 times faster than those of LiNi0.8Mn0.1Co0.1O2 and LiFePO4 cathodes, respectively. The imbalanced charge loss from parasitic reactions plays a critical role in exacerbating performance deterioration. In addition, a linear relationship between capacity loss and charge consumption from parasitic reactions provides fundamental support to assess calendar life through voltage-hold tests. These new findings imply that longer calendar life can be achieved by suppressing parasitic reactions at the Si anode to balance charge consumption during calendar aging.

Impact of rectifier metal-semiconductor contact geometry on electrical properties of Schottky diodes with Mg3N2interfacial layer.

The Ag/Mg3N2/p-Si heterojunction diode (HD) with rectifier contacts (RCs) with the same area in various geometries were fabricated through thermal evaporation, and the electrical performances of these diodes was compared. The geometry of the RC was found to affect various electrical properties such as ideality factor, saturation current and barrier height of HD, the rectifier rate, and the leakage current of the diodes. The experimental demonstrated the HD with a circular RC exhibited a higher rectifying ratio and lower leakage current compared to the other RCs. Hence, the design and optimization of the RC play a critical role in achieving the desired electrical properties of diode. These diodes, featuring an Mg3N2interfacial layer and showcasing photoconductive behavior, can be utilized as photodiodes in various optoelectronic devices.

A new line tunneling SiGe/Si iTFET with control gate for leakage suppression and subthreshold swing improvement.

This article presents a new line tunneling dominating metal-semiconductor contact-induced SiGe-Si tunnel field-effect transistor with control gate (CG-Line SiGe/Si iTFET). With a structure where two symmetrical control gates at the drain region are given a sufficient negative bias, the overlap of the energy bands at the drain in the OFF-state is effectively suppressed, thus reducing the tunneling probability and significantly decreasing leakage current. Additionally, the large overlap area between the source and gate improves the gate's ability to control the tunneling interface effectively, improving the ON-state current and subthreshold swing characteristics. By using the Schottky contact characteristics of a metal-semiconductor contact with different work functions to form a PN junction, the need to control doping profiles or random doping fluctuations is avoided. Furthermore, as ion implantation is not required, issues related to subsequent annealing are also eliminated, greatly reducing thermal budget. Due to the different material bandgap characteristics selected for the source and drain regions, the probability of overlap of the energy bands in the source region in the ON-state is increased and that in the drain region in the OFF-state is reduced. Based on the feasibility of the actual fabrication process and through rigorous 2D simulation studies, improvements in subthreshold swing and high on/off current ratio can be achieved simultaneously based on the proposed device structure. Additionally, the presence of the control gate structure effectively suppresses leakage current, further enhancing its potential for low-power-consumption applications.

Group Method of Data Handling Using Christiano-Fitzgerald Random Walk Filter for Insulator Fault Prediction.

Disruptive failures threaten the reliability of electric supply in power branches, often indicated by the rise of leakage current in distribution insulators. This paper presents a novel, hybrid method for fault prediction based on the time series of the leakage current of contaminated insulators. In a controlled high-voltage laboratory simulation, 15 kV-class insulators from an electrical power distribution network were exposed to increasing contamination in a salt chamber. The leakage current was recorded over 28 h of effective exposure, culminating in a flashover in all considered insulators. This flashover event served as the prediction mark that this paper proposes to evaluate. The proposed method applies the Christiano-Fitzgerald random walk (CFRW) filter for trend decomposition and the group data-handling (GMDH) method for time series prediction. The CFRW filter, with its versatility, proved to be more effective than the seasonal decomposition using moving averages in reducing non-linearities. The CFRW-GMDH method, with a root-mean-squared error of 3.44×10-12, outperformed both the standard GMDH and long short-term memory models in fault prediction. This superior performance suggested that the CFRW-GMDH method is a promising tool for predicting faults in power grid insulators based on leakage current data. This approach can provide power utilities with a reliable tool for monitoring insulator health and predicting failures, thereby enhancing the reliability of the power supply.

Design and Optimization of Multi-Stage TMR Sensors for Power Equipment AC/DC Leakage Current Detection.

Tunnel magnetoresistance (TMR) can measure weak magnetic fields and has significant advantages for use in alternating current/direct current (AC/DC) leakage current sensors for power equipment; however, TMR current sensors are easily perturbed by external magnetic fields, and their measurement accuracy and measurement stability are limited in complex engineering application environments. To enhance the TMR sensor measurement performance, this paper proposes a new multi-stage TMR weak AC/DC sensor structure with high measurement sensitivity and anti-magnetic interference capability. The front-end magnetic measurement characteristics and interference immunity of the multi-stage TMR sensor are found to be closely related to the multi-stage ring size design via finite element simulation. The optimal size of the multipole magnetic ring is determined using an improved non-dominated ranking genetic algorithm (ACGWO-BP-NSGA-II) to derive the optimal sensor structure. Experimental results demonstrate that the newly designed multi-stage TMR current sensor has a measurement range of 60 mA, a fitting nonlinearity error of less than 1%, a measurement bandwidth of 0-80 kHz, a minimum AC measurement value of 85 µA and a minimum DC measurement value of 50 µA, as well as a strong external electromagnetic interference. The TMR sensor can effectively enhance measurement precision and stability in the presence of intense external electromagnetic interference.

An Investigation of SILC Degradation under Constant Voltage Stress in PDSOI Devices.

The stress-induced leakage current (SILC) degradation of partially depleted silicon in insulator (PDSOI) devices under constant voltage stress (CVS) was studied. Firstly, the behaviors of threshold voltage degradation and SILC degradation of H-gate PDSOI devices under constant voltage stress were studied. It was found that both the threshold voltage degradation and SILC degradation of the device are power functions of the stress time, and the linear behavior between SILC degradation and threshold voltage degradation is good. Secondly, the soft breakdown characteristics of the PDSOI devices were studied under CVS. Thirdly, the effects of different gate stresses and different channel lengths on the threshold voltage degradation and SILC degradation of the device were studied. The results showed SILC degradation of the device under positive CVS and SILC degradation of the device under negative CVS. The shorter the channel length of the device was, the greater the SILC degradation of the device was. Finally, the influence of the floating effect on the SILC degradation of the PDSOI devices was studied, and the experimental results showed that the degree of SILC degradation of the floating device was greater than that of the H-type grid body contact PDSOI device. This showed that the floating body effect can exacerbate the SILC degradation of PDSOI devices.

A Study on the Increase of Leakage Current in AlGaN Detectors with Increasing Al Composition.

The dark leakage current of AlxGa1-xN Schottky barrier detectors with different Al contents is investigated. It was found that the dark leakage of AlxGa1-xN detectors increased with increasing Al content. The XRD and SIMS results showed that there was no significant difference of the dislocation density and carbon impurity concentration in five AlxGa1-xN samples with different Al content. This was likely not the main reason for the difference in dark leakage current of AlxGa1-xN detectors. However, the results of positron annihilation showed that the vacancy defect concentration increased with increasing Al content. This was consistent with the result that the dark leakage current increased with increasing Al content. With the increase of vacancy concentration, the vacancy defect energy levels also increased, and the probability of electron tunneling through defect levels increased. In contrast, the Schottky barrier height decreased, which eventually led to the increase of dark leakage current. This discovery should be beneficial to an accurate control of the performance of AlxGa1-xN detectors.

Modeling the Effects of Threading Dislocations on Current in AlGaN/GaN HEMT.

The aim of this paper is to model the effects of threading dislocations on both gate and drain currents of AlGaN/GaN high electron mobility transistors (HEMTs). The fraction of filled traps increases with the threading dislocations, while the trapping effects cause a decrease in drain current and an increase in gate leakage current. To model the drain current drop, the two simplified RC subcircuits with diodes are proposed to capture the charge trapping/detrapping characteristics. The trap voltages Vg_trap and Vd_trap generated by RC networks are fed back into the model to capture the effects of traps on drain current. Considering acceptor-decorated dislocations, we present a novel Poole-Frenkel (PF) model to precisely describe the reverse leakage gate current, which plays a dominant role in the gate leakage current. The proposed model, which uses physical parameters only, is implemented in Verilog-A. It is in excellent agreement with the experimental data.

Spatially-Resolved Study of the Electronic Transport and Resistive Switching in Polycrystalline Bismuth Ferrite.

Ferroelectric materials attract much attention for applications in resistive memory devices due to the large current difference between insulating and conductive states and the ability of carefully controlling electronic transport via the polarization set-up. Bismuth ferrite films are of special interest due to the combination of high spontaneous polarization and antiferromagnetism, implying the possibility to provide multiple physical mechanisms for data storage and operations. Macroscopic conductivity measurements are often hampered to unambiguously characterize the electric transport, because of the strong influence of the diverse material microstructure. Here, we studied the electronic transport and resistive switching phenomena in polycrystalline bismuth ferrite using advanced conductive atomic force microscopy (CAFM) at different temperatures and electric fields. The new approach to the CAFM spectroscopy and corresponding data analysis are proposed, which allow deep insight into the material band structure at high lateral resolution. Contrary to many studies via macroscopic methods, postulating electromigration of the oxygen vacancies, we demonstrate resistive switching in bismuth ferrite to be caused by the pure electronic processes of trapping/releasing electrons and injection of the electrons by the scanning probe microscopy tip. The electronic transport was shown to be comprehensively described by the combination of the space charge limited current model, while a Schottky barrier at the interface is less important due to the presence of the built-in subsurface charge.

Brief Theoretical Overview of Bi-Fe-O Based Thin Films.

This paper will provide a brief overview of the unique multiferroic material Bismuth ferrite (BFO). Considering that Bismuth ferrite is a unique material which possesses both ferroelectric and magnetic properties at room temperature, the uniqueness of Bismuth ferrite material will be discussed. Fundamental properties of the material including electrical and ferromagnetic properties also will be mentioned in this paper. Electrical properties include characterization of basic parameters considering the electrical resistivity and leakage current. Ferromagnetic properties involve the description of magnetic hysteresis characterization. Bismuth ferrite can be fabricated in a different form. The common forms will be mentioned and include powder, thin films and nanostructures. The most popular method of producing thin films based on BFO materials will be described and compared. Finally, the perspectives and potential applications of the material will be highlighted.