A novel reversible logic gate and its systematic approach to implement cost-efficient arithmetic logic circuits using QCA.

Ahmad, Peer Zahoor; Quadri, S M K; Ahmad, Firdous; Bahar, Ali Newaz; Wani, Ghulam Mohammad; Tantary, Shafiq Maqbool

Ahmad, Peer Zahoor; Quadri, S M K; Ahmad, Firdous; Bahar, Ali Newaz; Wani, Ghulam Mohammad; Tantary, Shafiq Maqbool.

Afiliação

Ahmad PZ; Department of Computer Science, University of Kashmir, Srinager, Jammu and Kashmir, India.
Quadri SMK; Department of Computer Science, Jamia Millia Islamia, New Delhi, India.
Ahmad F; Department of Electronics & IT, University of Kashmir, Srinager, Jammu and Kashmir, India.
Bahar AN; Department of Information & Communication Technology, Mawlana Bhashani Science and Technology University, Tangail, Bangladesh.
Wani GM; Department of Physics, Sri Pratap College, Srinagar, Jammu and Kashmir, India.
Tantary SM; Department of Physics, Govt Degree College Patan, Jammu and Kashmir, India.

Data Brief ; 15: 701-708, 2017 Dec.

Article em En | MEDLINE | ID: mdl-29124094

Palavras-chave

Adder; Addersubtractor; F-Gate; QCA; QCADesigner; Subtractor

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Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Tipo de estudo: Health_economic_evaluation Idioma: En Revista: Data Brief Ano de publicação: 2017 Tipo de documento: Article País de afiliação: Índia País de publicação: Holanda

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